TMS320C6452_13 Datasheet, PDF (136/181 Pages) Texas Instruments – TMS320C6452 Digital Signal Processor

TMS320C6452
SPRS371F – OCTOBER 2007 – REVISED APRIL 2012
HAS (input)
16
15
HCNTL[1:0]
(input)
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HR/W (input)
HSTROBE^(A)
(input)
HCS (input)
13
37
18
17
HD[31:0] (input)
35
4
38
34
5
HRDY^(B) (output)
A. HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT (HDS1 XOR HDS2)] OR HCS.
B. Depending on the type of write or read operation (HPID without auto-incrementing; HPIA, HPIC, or HPID with auto-
incrementing) and the state of the FIFO, transitions on HRDY may or may not occur. For more detailed information on
the HPI peripheral, see the TMS320C6452 DSP Host Port Interface (HPI) User's Guide (literature number SPRUF87)
Figure 6-40. HPI32 Write Timing (HAS Not Used, Tied High)
136 Peripheral Information and Electrical Specifications
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