NS16C552 Datasheet, PDF (9/24 Pages) Texas Instruments – PC16552D Dual Universal Asynchronous Receiver/Transmitter with FIFOs†

4 0 Timing Waveforms All timings are referenced to valid 0 and valid 1 (Continued)
RCVR FIFO First Byte (This Sets RDR)
RCVR FIFO Bytes Other Than the First Byte (RDR Is Already Set)
TL C 9426 – 10
Receiver Ready FCR0 e 0 or FCR0 e 1 and FCR3 e 0 (Mode 0)
TL C 9426 – 11
Note 1 This is the reading of the last byte in the FIFO
Note 2 If FCR0 e 1 then t_SINT e 3 RCLKs For a timeout interrupt t_SINT e 8 RCLKs
8
TL C 9426 – 12