MSP430F5438A Datasheet, PDF (9/106 Pages) Texas Instruments – Mixed Signal Microcontroller

MSP430F5438A, MSP430F5437A, MSP430F5436A, MSP430F5435A
MSP430F5419A, MSP430F5418A
www.ti.com
SLAS655D – JANUARY 2010 – REVISED AUGUST 2013
TERMINAL
NAME
PZ
P4.6/TB0.6
49
P4.7/TB0CLK/SMCLK
50
P5.4/UCB1SOMI/UCB1SCL
51
P5.5/UCB1CLK/UCA1STE
52
P5.6/UCA1TXD/UCA1SIMO
53
P5.7/UCA1RXD/UCA1SOMI
54
P7.2/TB0OUTH/SVMOUT
55
P7.3/TA1.2
56
P8.0/TA0.0
57
P8.1/TA0.1
58
P8.2/TA0.2
59
P8.3/TA0.3
60
P8.4/TA0.4
61
VCORE ⁽²⁾
62
DVSS2
63
DVCC2
64
P8.5/TA1.0
65
P8.6/TA1.1
66
P8.7
67
P9.0/UCB2STE/UCA2CLK
68
P9.1/UCB2SIMO/UCB2SDA
69
P9.2/UCB2SOMI/UCB2SCL
70
Table 2. Terminal Functions (continued)
NO.
I/O ⁽¹⁾
DESCRIPTION
PN ZQW
52
M11
I/O
General-purpose digital I/O
TB0 capture CCR6: CCI6A/CCI6B input, compare: Out6 output
General-purpose digital I/O
53 M12 I/O TB0 clock input
SMCLK output
General-purpose digital I/O
54 L12 I/O Slave out, master in – USCI_B1 SPI mode
I2C clock – USCI_B1 I2C mode
General-purpose digital I/O
55
J9
I/O
Clock signal input – USCI_B1 SPI slave mode
Clock signal output – USCI_B1 SPI master mode
Slave transmit enable – USCI_A1 SPI mode
General-purpose digital I/O
56 K11 I/O Transmit data – USCI_A1 UART mode
Slave in, master out – USCI_A1 SPI mode
General-purpose digital I/O
57 K12 I/O Receive data – USCI_A1 UART mode
Slave out, master in – USCI_A1 SPI mode
General-purpose digital I/O
58 J11 I/O Switch all PWM outputs high impedance – Timer TB0
SVM output
59
J12
I/O
General-purpose digital I/O
TA1 CCR2 capture: CCI2B input, compare: Out2 output
60
H9
I/O
General-purpose digital I/O
TA0 CCR0 capture: CCI0B input, compare: Out0 output
61
H11
I/O
General-purpose digital I/O
TA0 CCR1 capture: CCI1B input, compare: Out1 output
62
H12
I/O
General-purpose digital I/O
TA0 CCR2 capture: CCI2B input, compare: Out2 output
63
G9
I/O
General-purpose digital I/O
TA0 CCR3 capture: CCI3B input, compare: Out3 output
64
G11
I/O
General-purpose digital I/O
TA0 CCR4 capture: CCI4B input, compare: Out4 output
49 G12
Regulated core power supply output (internal use only, no external current
loading)
50 F12
Digital ground supply
51 E12
Digital power supply
65
F11
I/O
General-purpose digital I/O
TA1 CCR0 capture: CCI0B input, compare: Out0 output
66
E11
I/O
General-purpose digital I/O
TA1 CCR1 capture: CCI1B input, compare: Out1 output
N/A D12 I/O General-purpose digital I/O
N/A D11
General-purpose digital I/O
I/O
Slave transmit enable – USCI_B2 SPI mode
Clock signal input – USCI_A2 SPI slave mode
Clock signal output – USCI_A2 SPI master mode
N/A F9
General-purpose digital I/O
I/O Slave in, master out – USCI_B2 SPI mode
I2C data – USCI_B2 I2C mode
N/A C12
General-purpose digital I/O
I/O Slave out, master in – USCI_B2 SPI mode
I2C clock – USCI_B2 I2C mode
(2) VCORE is for internal use only. No external current loading is possible. VCORE should only be connected to the recommended
capacitor value, C_VCORE.
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