MSP430F5438A Datasheet, PDF (37/106 Pages) Texas Instruments – Mixed Signal Microcontroller

MSP430F5438A, MSP430F5437A, MSP430F5436A, MSP430F5435A
MSP430F5419A, MSP430F5418A
www.ti.com
SLAS655D – JANUARY 2010 – REVISED AUGUST 2013
Table 38. USCI_B1 Registers (Base Address: 0620h)
REGISTER DESCRIPTION
USCI synchronous control 1
USCI synchronous control 0
USCI synchronous bit rate 0
USCI synchronous bit rate 1
USCI synchronous status
USCI synchronous receive buffer
USCI synchronous transmit buffer
USCI I2C own address
USCI I2C slave address
USCI interrupt enable
USCI interrupt flags
USCI interrupt vector word
REGISTER
UCB1CTL1
UCB1CTL0
UCB1BR0
UCB1BR1
UCB1STAT
UCB1RXBUF
UCB1TXBUF
UCB1I2COA
UCB1I2CSA
UCB1IE
UCB1IFG
UCB1IV
OFFSET
00h
01h
06h
07h
0Ah
0Ch
0Eh
10h
12h
1Ch
1Dh
1Eh
Table 39. USCI_A2 Registers (Base Address: 0640h)
REGISTER DESCRIPTION
USCI control 1
USCI control 0
USCI baud rate 0
USCI baud rate 1
USCI modulation control
USCI status
USCI receive buffer
USCI transmit buffer
USCI LIN control
USCI IrDA transmit control
USCI IrDA receive control
USCI interrupt enable
USCI interrupt flags
USCI interrupt vector word
REGISTER
UCA2CTL1
UCA2CTL0
UCA2BR0
UCA2BR1
UCA2MCTL
UCA2STAT
UCA2RXBUF
UCA2TXBUF
UCA2ABCTL
UCA2IRTCTL
UCA2IRRCTL
UCA2IE
UCA2IFG
UCA2IV
OFFSET
00h
01h
06h
07h
08h
0Ah
0Ch
0Eh
10h
12h
13h
1Ch
1Dh
1Eh
Table 40. USCI_B2 Registers (Base Address: 0660h)
REGISTER DESCRIPTION
USCI synchronous control 1
USCI synchronous control 0
USCI synchronous bit rate 0
USCI synchronous bit rate 1
USCI synchronous status
USCI synchronous receive buffer
USCI synchronous transmit buffer
USCI I2C own address
USCI I2C slave address
USCI interrupt enable
USCI interrupt flags
USCI interrupt vector word
REGISTER
UCB2CTL1
UCB2CTL0
UCB2BR0
UCB2BR1
UCB2STAT
UCB2RXBUF
UCB2TXBUF
UCB2I2COA
UCB2I2CSA
UCB2IE
UCB2IFG
UCB2IV
OFFSET
00h
01h
06h
07h
0Ah
0Ch
0Eh
10h
12h
1Ch
1Dh
1Eh
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