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MSP430F5438A Datasheet, PDF (72/106 Pages) Texas Instruments – Mixed Signal Microcontroller
MSP430F5438A, MSP430F5437A, MSP430F5436A, MSP430F5435A
MSP430F5419A, MSP430F5418A
SLAS655D – JANUARY 2010 – REVISED AUGUST 2013
Port P3, P3.0 to P3.7, Input/Output With Schmitt Trigger
P3REN.x
Pad Logic
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P3DIR.x
P3OUT.x
Module X OUT
P3SEL.x
P3IN.x
Module X IN
0
1
0
1
EN
D
Direction
0: Input
1: Output
DVSS
0
DVCC
1
1
P3DS.x
0: Low drive
1: High drive
P3.0/UB0STE/UCA0CLK
P3.1/UCB0SIMO/UCB0SDA
P3.2/UCB0SOMI/UCB0SCL
P3.3/USC0CLK/UCA0STE
P3.4/UCA0TXD/UCA0SIMO
P3.5/UCA0RXD/UCA0SOMI
P3.6/UCB1STE/UCA1CLK
P3.7/UCB1SIMO/UCB1SDA
Table 46. Port P3 (P3.0 to P3.7) Pin Functions
PIN NAME (P3.x)
x
FUNCTION
P3.0/UCB0STE/UCA0CLK
P3.1/UCB0SIMO/UCB0SDA
P3.2/UCB0SOMI/UCB0SCL
P3.3/UCB0CLK/UCA0STE
P3.4/UCA0TXD/UCA0SIMO
P3.5/UCA0RXD/UCA0SOMI
P3.6/UCB1STE/UCA1CLK
P3.7/UCB1SIMO/UCB1SDA
0 P3.0 (I/O)
UCB0STE/UCA0CLK(2) (3)
1 P3.1 (I/O)
UCB0SIMO/UCB0SDA(2) (4)
2 P3.2 (I/O)
UCB0SOMI/UCB0SCL (2) (4)
3 P3.3 (I/O)
UCB0CLK/UCA0STE(2) (5)
4 P3.4 (I/O)
UCA0TXD/UCA0SIMO (2)
5 P3.5 (I/O)
UCA0RXD/UCA0SOMI (2)
6 P3.6 (I/O)
UCB1STE/UCA1CLK(2) (6)
7 P3.7 (I/O)
UCB1SIMO/UCB1SDA(2) (4)
CONTROL BITS/SIGNALS(1)
P3DIR.x
P3SEL.x
I: 0; O: 1
0
X
1
I: 0; O: 1
0
X
1
I: 0; O: 1
0
X
1
I: 0; O: 1
0
X
1
I: 0; O: 1
0
X
1
I: 0; O: 1
0
X
1
I: 0; O: 1
0
X
1
I: 0; O: 1
0
X
1
(1) X = Don't care
(2) The pin direction is controlled by the USCI module.
(3) UCA0CLK function takes precedence over UCB0STE function. If the pin is required as UCA0CLK input or output, USCI_B0 is forced to
3-wire SPI mode if 4-wire SPI mode is selected.
(4) If the I2C functionality is selected, the output drives only the logical 0 to VSS level.
(5) UCB0CLK function takes precedence over UCA0STE function. If the pin is required as UCB0CLK input or output, USCI_A0 is forced to
3-wire SPI mode if 4-wire SPI mode is selected.
(6) UCA1CLK function takes precedence over UCB1STE function. If the pin is required as UCA1CLK input or output, USCI_B1 is forced to
3-wire SPI mode if 4-wire SPI mode is selected.
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