DS16EV5110A_15 Datasheet, PDF (9/25 Pages) Texas Instruments – Video Equalizer (3D+C) for DVI, HDMI Source/Repeater/Sink Applications

DS16EV5110A
www.ti.com
SNLS301C – JULY 2008 – REVISED APRIL 2013
9. The Device drives the 8-bit data value (register contents).
10. The Host drives a NACK bit “1”indicating end of the READ transfer.
11. The Host drives a STOP condition.
12. The Host de-selects the device by driving its SMBus CS signal Low.
The READ transaction is completed, the bus goes IDLE and communication with other SMBus devices may now
occur.
Please see Table 1 for more information.
Name
Status
Address
0x00
Status
Status
Internal
Enable/
Individual
Channel
Boost
Control
for
C_IN±,
D_IN0±
0x01
0x02
0x03
Individual
Channel
Boost
Control
for
D_IN1±,
D_IN2±
0x04
Signal
0x05
Detect ON
(SD_ON)
Signal
0x06
Detect OFF
(SD_OFF)
SMBus
orCMOS
Control for
EN
0x07
Output
Level
0x08
Table 1. SMBus Register Descriptions
Default Type⁽¹⁾ Bit 7
Bit 6 Bit 5 Bit 4 Bit 3
Bit 2
Bit 1
Bit 0
0x00 RO
ID Revision
Reserved Reserved Reserve SD
d
0x00 RO
Reserved Boost 1
EN
Reserved
0x00 RO
Reserved Boost 3
Reserved Boost 2
0x77 RW
EN (Int.)
0:Enable
1:Disable
(D_IN0±)
Boost Control
(BC for CH0)
000 (Min Boost)
001
010
011
100
101
110
111 (Max Boost)
EN (Int.)
0:Enable
1:Disable
(C_IN±)
Reserved
0x77 RW
EN (Int.)
0:Enable
1:Disable
(D_IN2±)
Boost Control
(BC for CH2)
000 (Min Boost)
001
010
011
100
101
110
111 (Max Boost)
EN (Int.)
0:Enable
1:Disable
(D_IN1±)
Boost Control
(BC for CH1)
000 (Min Boost)
001
010
011
100
101
110
111 (Max Boost)
0x00 RW
Reserved
Threshold (mV)
00: 70 (Default)
01: 55
10: 90
11: 75
0x00 RW
Reserved
Threshold (mV)
00: 40 (Default)
01: 30
10: 55
11: 45
0x00 RW
Reserved
SMBus
Enable
0: Disable
1: Enable
0x78 RW
Reserved
Output Level:
00: 540 mVp-p
01: 770 mVp-p
10: 1000 mVp-p
11: 1200 mVp-p
Reserved
(1) Note: RO = Read Only, RW = Read/Write
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