DS16EV5110A_15 Datasheet, PDF (3/25 Pages) Texas Instruments – Video Equalizer (3D+C) for DVI, HDMI Source/Repeater/Sink Applications

DS16EV5110A
www.ti.com
SNLS301C – JULY 2008 – REVISED APRIL 2013
PIN DESCRIPTIONS (continued)
Pin Name Pin Number I/O⁽¹⁾, Type
Description
System Management Bus (SMBus) Interface Control Pins
SDA
18
IO, LVCMOS SMBus Data Input / Output. Internally pulled High to 3.3V with High-Z pull up.
SDC
17
I, LVCMOS SMBus Clock Input. Internally pulled High to 3.3V with High-Z pull up.
CS
16
I, LVCMOS SMBus Chip select. When held High, the equalizer SMBus register is enabled. When held
Low, the equalizer SMBus register is disabled. CS is internally pulled Low. CS is internally
gated with SDC.
Other
Reserv
19, 20, 38,
39, 40,41,
42, 43, 47,
48
Reserved. Do not connect.
Connection Diagram
C_IN- 1
C_IN+ 2
VDD 3
D_IN0- 4
D_IN0+ 5
VDD 6
VDD 7
D_IN1- 8
D_IN1+ 9
VDD 10
D_IN2- 11
D_IN2+ 12
DAP = GND
DS16EV5110ASQ
(Top View)
36 C_OUT-
35 C_OUT+
34 GND
33 D_OUT0-
32 D_OUT0+
31 GND
30 GND
29 D_OUT1-
28 D_OUT1+
27 GND
26 D_OUT2-
25 D_OUT2+
TOP VIEW — Not to Scale
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