AMC80 Datasheet, PDF (9/23 Pages) Texas Instruments – System Hardware Monitor with Two-Wire/SMBus Serial Interface

AMC80
www.ti.com
THEORY OF OPERATION
SBOS559 – MAY 2011
BLOCK LEVEL DESCRIPTION
The AMC80 provides seven analog inputs, a temperature sensor, a delta-sigma analog-to-digital converter
(ADC), and a variety of inputs and outputs on a single chip. A two-wire SMBus interface is also provided. The
AMC80 can continuously perform power-supply, temperature, and fan monitoring for a variety of applications.
The AMC80 is fully pin- and software-compatible with the LM96080 and LM80.
The AMC80 continuously converts analog inputs to 10-bit resolution using a 2.5-mV least significant bit (LSB)
with a default input range of 0 V to 2.56 V, or a 6-mV LSB with a programmable input range of 0 V to V+. The
analog inputs (CH0 to CH6) are intended for connection to the several power supplies present in any typical
system. Temperature can be converted to a 9-bit or 12-bit resolution with either 0.5°C or 0.0625°C LSB,
respectively. The FAN1 and FAN2 inputs can be programmed to accept either a fan failure indicator or
tachometer signals. Fan failure signals can be programmed to be either active high or active low. Fan inputs
measure the period of tachometer pulses from the the fans, providing a higher count for lower fan speeds. The
fan inputs are digital inputs with transition levels according to the Digital Inputs section of the Electrical
Characteristics table. Full-scale fan counts are 255 (8-bit counter), which represent a stopped or very slow fan.
Nominal speeds, based on a count of 153, are programmable from 1100 RPM to 8800 RPM. Signal conditioning
circuitry is included to accommodate slow rise and fall times.
The AMC80 provides a number of internal registers:
• Configuration Register: Provides control and configuration.
• Interrupt Status Registers: Two registers that provide the status of each interrupt alarm.
• Interrupt Mask Registers: Allows masking of individual interrupt sources, as well as separate masking for
both hardware interrupt outputs.
• Fan Divisor/RST_OUT/OS Register: Bits 0 to 5 of this register contain the divisor bits for the FAN1 and
FAN2 inputs. Bits 6 and 7 control the function of the RST_OUT/OS output.
• OS Configuration/Temperature Resolution Register: The configuration of the overtemperature shutdown
(OS) is controlled by the lower three bits of this register. Bit 3 enables 12-bit temperature conversions. In
12-bit mode, bits 4 to 7 represent the four LSBs of the temperature measurement. In 9-bit mode, bit 4
represents the LSB of the temperature measurement.
• Conversion Rate Register: Sets the time interval of the continuous monitoring cycle to either fixed or
programmable (see the Conversion Rate Count Register for setting the programmable time interval).
• Voltage/Temperature Channel Disable Register: Allows voltage inputs and the local temperature
conversion to be disabled.
• Input Mode Register: Allows voltage inputs to be configured as single-ended or as a differential pair with
normal or reverse polarity.
• ADC Control Register: Bits 0 to 2 set the programmable conversion rate for the 10-bit ADC. Bits 3 to 5 allow
for programmable input full-scale voltage.
• Conversion Rate Count Register: Selects the adjustable time interval when the conversion rate of the
continuous monitoring cycle is set to programmable.
• Value RAM: The monitoring results (for temperature, voltages, fan counts, and Fan Divisor/RST_OUT/OS
Register limits) are all contained in the Value RAM. The Value RAM consists of 32 bytes. The first 10 bytes
are all of the results, the next 20 bytes are the interrupt alarm limits, and the last two bytes are at the upper
locations for manufacturer ID and die revision ID.
The AMC80 SMBus is compatible with both fast mode (400 kHz) and high-speed mode (3.4 MHz) two-wire
interface modes of operation. The AMC80 supports a timeout reset function on SDA and SCL that prevents
two-wire bus lockup, and includes an analog filter on the two-wire digital control lines that improves noise
immunity. Three address pins (A0 to A2), allow up to eight devices on a single bus. When enabled, the AMC80
starts by cycling through each measurement in sequence, and continuously loops through the sequence based
on the Conversion Rate Register (address 07h) setting. Each measured value is compared to values stored in
the Value RAM Registers (addresses 2Ah to 3Dh). When the measured value exceeds the programmed limit, the
AMC80 sets a corresponding interrupt in the Interrupt Status Registers (addresses 01h and 02h). Two output
interrupt lines (INT and RST_OUT/OS) are available. INT is fully programmable with the ability to mask each
interrupt source and each output. The Fan Divisor/RST_OUT/OS Register (address 05h) has control bits that
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): AMC80
Submit Documentation Feedback
9