AMC80 Datasheet, PDF (11/23 Pages) Texas Instruments – System Hardware Monitor with Two-Wire/SMBus Serial Interface

AMC80
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1
SCL
91
SBOS559 – MAY 2011
9
¼
SDA
0
Start By
Master
1
SCL
(Continued)
1
0
1 A2⁽¹⁾ A1⁽¹⁾ A0⁽¹⁾ R/W
P7 P6 P5 P4 P3 P2 P1 P0
¼
ACK By
AMC80
ACK By
AMC80
Frame 1 Two-Wire Slave Address Byte
Frame 2 Pointer Register Byte
9
1
9
SDA
(Continued)
D7 D6
D5 D4 D3 D2 D1
Frame 3 Data Byte 1
D0
ACK By
AMC80
D7 D6 D5 D4 D3 D2 D1 D0
ACK By
AMC80
Frame 4 Data Byte 2
(1) The values of A0, A1, and A2 are determined by the A0, A1, and A2 pins, respectively.
Figure 8. Two-Wire Timing for Write Word Format
Stop By
Master
1
SCL
91
9
¼
SDA
0
Start By
Master
1
0
1 A2⁽¹⁾ A1⁽¹⁾ A0⁽¹⁾ R/W
P7 P6 P5 P4 P3 P2 P1 P0
Frame 1 Two-Wire Slave Address Byte
ACK By
AMC80
Frame 2 Pointer Register Byte
ACK By
AMC80
Stop By
Master
1
SCL
(Continued)
91
9
¼
SDA
0
(Continued)
Start By
Master
1
0
1 A2⁽¹⁾ A1⁽¹⁾ A0⁽¹⁾ R/W
D7 D6 D5 D4 D3 D2 D1 D0
Frame 3 Two-Wire Slave Address Byte
ACK By
AMC80
From
AMC80
Frame 4 Data Byte 1 Read Register
¼
ACK By
Master⁽²⁾
1
9
SCL
(Continued)
SDA
(Continued) ^{D7 D6}
D5 D4 D3 D2 D1 D0
From
AMC80
ACK By
Master⁽³⁾
Frame 5 Data Byte 2 Read Register
Stop By
Master
(1) The values of A0, A1, and A2 are determined by the A0, A1, and A2 pins, respectively.
(2) Master should leave SDA high to terminate a single-byte read operation.
(3) Master should leave SDA high to terminate a two-byte read operation.
Figure 9. Two-Wire Timing for Read Word Format
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