TM4C1292NCPDT Datasheet, PDF (810/1822 Pages) Texas Instruments – Tiva Microcontroller

External Peripheral Interface (EPI)
Figure 11-1. EPI Block Diagram
NBRFIFO
8 x 32 bits
General
Parallel
GPIO
AHB
AHB
Bus
Interface
With
DMA
WFIFO
4 x 32 bits
Baud
Rate
Control
(Clock)
SDRAM
Host Bus
Wide
Parallel
Interface
EPI 31:0
11.2
Signal Description
The following table lists the external signals of the EPI controller and describes the function of each.
The EPI controller signals are alternate functions for GPIO signals and default to be GPIO signals
at reset. The column in the table below titled "Pin Mux/Pin Assignment" lists the GPIO pin placement
for the EPI signals. The AFSEL bit in the GPIO Alternate Function Select (GPIOAFSEL) register
(page 763) should be set to choose the EPI controller function. The number in parentheses is the
encoding that must be programmed into the PMCn field in the GPIO Port Control (GPIOPCTL)
register (page 780) to assign the EPI signals to the specified GPIO port pins. For more information
on configuring GPIOs, see “General-Purpose Input/Outputs (GPIOs)” on page 734.
Table 11-1. External Peripheral Interface Signals (128TQFP)
Pin Name
EPI0S0
EPI0S1
EPI0S2
EPI0S3
EPI0S4
EPI0S5
EPI0S6
EPI0S7
Pin Number Pin Mux / Pin
Assignment
18
PK0 (15)
29
PH0 (15)
19
PK1 (15)
30
PH1 (15)
20
PK2 (15)
31
PH2 (15)
21
PK3 (15)
32
PH3 (15)
22
PC7 (15)
23
PC6 (15)
24
PC5 (15)
25
PC4 (15)
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Buffer Type Description
TTL
EPI module 0 signal 0.
TTL
EPI module 0 signal 1.
TTL
EPI module 0 signal 2.
TTL
EPI module 0 signal 3.
TTL
EPI module 0 signal 4.
TTL
EPI module 0 signal 5.
TTL
EPI module 0 signal 6.
TTL
EPI module 0 signal 7.
810
June 18, 2014
Texas Instruments-Production Data