TM4C1292NCPDT Datasheet, PDF (435/1822 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C1292NCPDT Microcontroller
Register 130: Inter-Integrated Circuit Deep-Sleep Mode Clock Gating Control
(DCGCI2C), offset 0x820
The DCGCI2C register provides software the capability to enable and disable the I²C modules in
deep-sleep mode. When enabled, a module is provided a clock. When disabled, the clock is disabled
to save power.
Important: This register should be used to control the clocking for the I²C modules.
Inter-Integrated Circuit Deep-Sleep Mode Clock Gating Control (DCGCI2C)
Base 0x400F.E000
Offset 0x820
Type RW, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Type RO
RO
RO
RO
RO
RO
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:10
9
Name
reserved
D9
Type
RO
RW
Reset
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
I²C Module 9 Deep-Sleep Mode Clock Gating Control
Value Description
0
I²C module 9 is disabled in deep-sleep mode.
1
Enable and provide a clock to I²C module 9 in deep-sleep mode.
8
D8
RW
0
I²C Module 8 Deep-Sleep Mode Clock Gating Control
Value Description
0
I²C module 8 is disabled in deep-sleep mode.
1
Enable and provide a clock to I²C module 8 in deep-sleep mode.
7
D7
RW
0
I²C Module 7 Deep-Sleep Mode Clock Gating Control
Value Description
0
I²C module 7 is disabled in deep-sleep mode.
1
Enable and provide a clock to I²C module 7 in deep-sleep mode.
6
D6
RW
0
I²C Module 6 Deep-Sleep Mode Clock Gating Control
Value Description
0
I²C module 6 is disabled in deep-sleep mode.
1
Enable and provide a clock to I²C module 6 in deep-sleep mode.
June 18, 2014
435
Texas Instruments-Production Data