TM4C1292NCPDT Datasheet, PDF (388/1822 Pages) Texas Instruments – Tiva Microcontroller

System Control
Register 93: Synchronous Serial Interface Run Mode Clock Gating Control
(RCGCSSI), offset 0x61C
The RCGCSSI register provides software the capability to enable and disable the SSI modules in
Run mode. When enabled, a module is provided a clock and accesses to module registers are
allowed. When disabled, the clock is disabled to save power and accesses to module registers
generate a bus fault.
Important: This register should be used to control the clocking for the SSI modules.
Synchronous Serial Interface Run Mode Clock Gating Control (RCGCSSI)
Base 0x400F.E000
Offset 0x61C
Type RW, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
R3
R2
R1
R0
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:4
3
Name
reserved
R3
Type
RO
RW
Reset
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
SSI Module 3 Run Mode Clock Gating Control
Value Description
0 SSI module 3 is disabled.
1 Enable and provide a clock to SSI module 3 in Run mode.
2
R2
RW
0
SSI Module 2 Run Mode Clock Gating Control
Value Description
0 SSI module 2 is disabled.
1 Enable and provide a clock to SSI module 2 in Run mode.
1
R1
RW
0
SSI Module 1 Run Mode Clock Gating Control
Value Description
0 SSI module 1 is disabled.
1 Enable and provide a clock to SSI module 1 in Run mode.
0
R0
RW
0
SSI Module 0 Run Mode Clock Gating Control
Value Description
0 SSI module 0 is disabled.
1 Enable and provide a clock to SSI module 0 in Run mode.
388
June 18, 2014
Texas Instruments-Production Data