English
Language : 

OMAP3503-HIREL Datasheet, PDF (76/329 Pages) Texas Instruments – OMAP3503-HiRel Applications Processor
OMAP3503-HiRel
SPRS663 – FEBRUARY 2010
www.ti.com
Table 2-3. Ball Characteristics (CBC Pkg.) (1) (continued)
BALL
BALL TOP PIN NAME MODE [4] TYPE [5]
BOTTOM [1] [2]
[3]
gpio_133 4
IO
safe_mode 7
-
U10
NA
mmc2_dat2 0
IO
mcspi3_cs1 1
O
gpio_134 4
IO
safe_mode 7
-
U9
NA
mmc2_dat3 0
IO
mcspi3_cs0 1
IO
gpio_135 4
IO
safe_mode 7
-
V10
NA
mmc2_dat4 0
IO
mmc2_dir_da 1
O
t0
mmc3_dat0 3
IO
gpio_136 4
IO
safe_mode 7
-
R2
NA
uart1_rts 0
O
ssi1_flag_tx 1
O
gpio_149 4
IO
safe_mode 7
-
H3
NA
uart1_rx
0
I
mcbsp1_clkr 2
IO
mcspi4_clk 3
IO
gpio_151 4
IO
safe_mode 7
-
L4
NA
uart1_tx
0
O
ssi1_dat_tx 1
O
gpio_148 4
IO
safe_mode 7
-
Y24
NA
uart2_cts 0
I
mcbsp3_dx 1
IO
gpt9_pwm_e 2
IO
vt
gpio_144 4
IO
safe_mode 7
-
AA24
NA
uart2_rts 0
O
mcbsp3_dr 1
I
gpt10_pwm_ 2
IO
evt
gpio_145 4
IO
safe_mode 7
-
AD21
NA
uart2_rx
0
I
mcbsp3_fsx 1
IO
gpt8_pwm_e 2
IO
vt
gpio_147 4
IO
safe_mode 7
-
AD22
NA
uart2_tx
0
O
mcbsp3_clkx 1
IO
BALL
RESET
STATE [6]
BALL
RESET REL. POWER [9] HYS [10]
RESET REL. MODE [8]
STATE [7]
H
H
7
vdds
Yes
H
H
7
vdds
Yes
L
L
7
vdds
Yes
L
L
7
vdds
Yes
L
L
7
vdds
Yes
L
L
7
vdds
Yes
H
H
7
vdds
Yes
H
H
7
vdds
Yes
H
H
7
vdds
Yes
H
H
7
vdds
Yes
BUFFER PULLUP
STRENG TH /DOWN
(mA) [11] TYPE [12]
4 (4)
PU100/
PD100
4 (4)
PU100/
PD100
4 (4)
PU100/
PD100
4 (4)
PU100/
PD100
4 (4)
PU100/
PD100
4 (4)
PU100/
PD100
4
PU100/
PD100
4
PU100/
PD100
4
PU100/
PD100
4
PU100/
PD100
IO CELL [13]
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
76
TERMINAL DESCRIPTION
Submit Documentation Feedback
Product Folder Link(s): OMAP3503-HiRel
Copyright © 2010, Texas Instruments Incorporated