OMAP3503-HIREL Datasheet, PDF (63/329 Pages) Texas Instruments – OMAP3503-HiRel Applications Processor

OMAP3503-HiRel
www.ti.com
SPRS663 – FEBRUARY 2010
Table 2-2. Ball Characteristics (CBB Pkg.) ⁽¹⁾ (continued)
BALL
BALL TOP PIN NAME MODE [4] TYPE [5]
BOTTOM [1] [2]
[3]
AH7
NA
AG8
NA
AH8
NA
AE9, AE18, NA
AE19, AE24,
AC4, Y16,
Y18, Y19,
Y20, W18,
W20, V20,
U19, U20,
T19, P20,
N19, N20,
M19, M25,
L25, K18,
K20, J4, J18,
J19, J20, H4,
E25, D8, D9,
D15, D22,
D23
Y9, Y10,
NA
Y11, Y14,
Y15, W9,
W11, W12,
W15, U10,
T9, T10, R9,
R10, N10,
M9, M10, L9,
L10, K11,
K14, K13, J9,
J10, J11,
J14, J15
AH6, U1, R4, NA
J1, J2, G28,
F1, F2, D16,
C16, C28,
B5, B8, B12,
B18, B22,
A5, A8, A12,
A18, A22
AG20, AG21, NA
AG27, AF8,
AF16, AF23,
AE8, AE16,
AE23, AE27,
AD3, AD4,
W4, H28,
F25, F26
W16
NA
K15
NA
AA16
NA
AA14
NA
hsusb2_tll_di 6
r
etk_d13
0
hsusb2_nxt 3
gpio_27
4
mm2_rxdm 5
hsusb2_tll_n 6
xt
etk_d14
0
hsusb2_
3
data0
gpio_28
4
mm2_rxrcv 5
hsusb2_tll_ 6
data0
etk_d15
0
hsusb2_
3
data1
gpio_29
4
mm2_txse0 5
hsusb2_tll_ 6
data1
vdd_core 0
vdd_mpu 0
vdds_mem 0
vdds
0
vdds_sram 0
vdds_dpll_dll 0
vdds_dpll_pe 0
r
vdds_wkup_ 0
bg
O
O
I
IO
IO
O
O
IO
IO
IO
IO
O
IO
IO
IO
IO
PWR
PWR
PWR
PWR
PWR
PWR
PWR
BALL
RESET
STATE [6]
BALL
RESET REL. POWER [9] HYS [10]
RESET REL. MODE [8]
STATE [7]
L
L
4
vdds
Yes
L
L
4
vdds
Yes
L
L
4
vdds
Yes
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
BUFFER PULLUP
STRENG TH /DOWN
(mA) [11] TYPE [12]
IO CELL [13]
4
PU/ PD
LVCMOS
4
PU/ PD
LVCMOS
4
PU/ PD
LVCMOS
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Copyright © 2010, Texas Instruments Incorporated
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TERMINAL DESCRIPTION
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