TMS320C6654 Datasheet, PDF (72/222 Pages) Texas Instruments – Fixed and Floating-Point Digital Signal Processor

TMS320C6654
Fixed and Floating-Point Digital Signal Processor
SPRS841—March 2012
3.3.5 LRESETNMI PIN Status (LRSTNMIPINSTAT) Register
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The LRSTNMIPINSTAT Register is created in Boot Configuration to latch the status of LRESET and NMI based on
CORESEL. The LRESETNMI PIN Status Register is shown and described in the following tables.
Figure 3-4 LRESETNMI PIN Status Register (LRSTNMIPINSTAT)
31
18
17
16
15
2
1
0
Reserved
Reserved
NMI0
Reserved
Reserved
LR0
R, +0000 0000
R-0
R-0
R, +0000 0000
R-0
R-0
Legend: R = Read only; -n = value after reset;
Table 3-6
LRESETNMI PIN Status Register (LRSTNMIPINSTAT) Field Descriptions
Bit Field
31-18 Reserved
17 Reserved
16 NMI0
15-2 Reserved
1
Reserved
0
LR0
End of Table 3-6
Description
Reserved
Reserved
CorePac0 in NMI
Reserved
Reserved
CorePac0 in Local Reset
3.3.6 LRESETNMI PIN Status Clear (LRSTNMIPINSTAT_CLR) Register
The LRSTNMIPINSTAT_CLR Register is used to clear the status of LRESET and NMI based on CORESEL. The
LRESETNMI PIN Status Clear Register is shown and described in the following tables.
Figure 3-5 LRESETNMI PIN Status Clear Register (LRSTNMIPINSTAT_CLR)
31
18
17
16
15
2
1
0
Reserved
Reserved
NMI0
Reserved
Reserved
LR0
R, +0000 0000
WC,+0
WC,+0
R, +0000 0000
WC,+0
WC,+0
Legend: R = Read only; -n = value after reset; WC = Write 1 to Clear
Table 3-7
LRESETNMI PIN Status Clear Register (LRSTNMIPINSTAT_CLR) Field Descriptions
Bit Field
31-18 Reserved
17 Reserved
16 NMI0
15-2 Reserved
1
Reserved
0
LR0
End of Table 3-7
Description
Reserved
Reserved
CorePac0 in NMI Clear
Reserved
Reserved
CorePac0 in Local Reset Clear
72 Device Configuration
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