LM3463_12 Datasheet, PDF (7/40 Pages) Texas Instruments – LM3463 Dynamic Headroom Controller with Thermal Control Interface and Individual Channel Dimming Control

LM3463
www.ti.com
SNVS807 – MAY 2012
Electrical Characteristics
Specification with standard type are for T_A = T_J = +25°C only; limits in boldface type apply over the full Operating Junction
Temperature (T_J) range. Minimum and Maximum are guaranteed through test, design or statistical correlation. Typical values
represent the most likely parametric norm at T_J = +25°C, and are provided for reference purposes only. Unless otherwise
stated, the following conditions apply: V_IN = 48V.
Symbol
Parameter
Conditions
Min
Typ Max Units
Supply
I_IN
I_SD
VIN UVLO
V_IN Quiescent Current
V_IN Shut-Down Current
V_EN pin floating
V_EN = 0V
9.75
15
mA
550 800
µA
V_IN-UVLO
VCC Regulator
V_IN Turn-on Threshold
V_IN Turn-off Threshold
V_IN UVLO Hysteresis
7.4
10
V
4.5
7.1
V
300
mV
V_CC
V_CC Regulated Voltage
I_VCC-LIM
V_CC Current Limit
V_CC-UVLO
V_CC Turn-on Threshold
V_CC Turn-off Threshold
V_CC UVLO hysteresis
Internal Reference Voltage Regulator
C_VCC = 1 µF, I_VCC=1mA
I_CC = 10 mA
V_CC = 0V
V_CC Decreasing
6.240 6.475 6.760 V
6.230 6.462 6.741 V
28
45
mA
4.5
4.7
V
3.75 4.20
V
300
mV
V_VREF
Reference Voltage Regulator Output
Voltage
I_VREF-SC
VREF Pin Short-Circuit Current
Dimming Control Interfaces
C_VREF = 0.47 µF, No Load
I_VREF = 2mA
V_VREF = V_REFRTN
2.453 2.499 2.564 V
2.443 2.496 2.545 V
7.0
8.2 10.5 mA
Analog Mode
V_DIMn-MAX
DIMn Voltage at 100% Output Duty
Cycle
MODE = VCC
5.65
V
V_DIMn-MIN
V_DIMn-001H
PWM Mode
DIMn Voltage at 0% Output Duty Cycle MODE = VCC
DIMn Voltage at data code = 001h
MODE = VCC
807
mV
826
mV
V_DIM-LED-ON
V_DIM-LED-OFF
V_DIM-LED-HYS
DIMn Voltage Threshold at LED ON
DIMn Voltage Threshold at LED OFF
DIMn Voltage Hysteresis at LED ON to
OFF
MODE = GND
1.50 1.75
V
1.1
1.4
V
100
mV
System Clock Generator
V_FS
I_FS-SC
f_OSC
Bus Interface Mode
FS Pin Voltage
FS Pin Short-Circuit Current
System Clock Frequency
FS Pin = Open
V_FS = 0V
R_FS = 14 kΩ
1.173
0.90
1.235
110
1.00
1.297
140
1.15
V
µA
MHz
V_{SCLK-HIGH (DIM23)}
SCLK (Serial CLK) Logic High
Threshold
MODE = Hi-Z
1.50 1.75
V
V_{SCLK-LOW (DIM23)}
SCLK (Serial CLK) Logic Low
Threshold
MODE = Hi-Z
1.1
1.4
V
V_{SCLK-HYS (DIM23)}
V_{SDA-HIGH (DIM01)}
SCLK (Serial CLK) Hysteresis
SDA (Serial Data) Logic High
Threshold
MODE = Hi-Z
MODE = Hi-Z
100
mV
1.50 1.75
V
V_{SDA-LOW (DIM01)}
SDA (Serial Data) Logic Low Threshold
V_{SDA-HYS (DIM01)}
SDA (Serial Data) Hysteresis
Dynamic headroom Control
MODE = Hi-Z
MODE = Hi-Z
1.1
1.4
V
100
mV
V_{DRn-DHC-STDEAY}
The lowest VDRn when DHC is under Measure at DRn pin
steady state
0.95
V
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LM3463
Submit Documentation Feedback
7