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LM3463_12 Datasheet, PDF (17/40 Pages) Texas Instruments – LM3463 Dynamic Headroom Controller with Thermal Control Interface and Individual Channel Dimming Control
LM3463
www.ti.com
SNVS807 – MAY 2012
REFRTN and GND
The REFRTN pin is the reference point for the high precision and low noise internal circuits. The pins which
referenced to the REFRTN are VREF, IOUTADJ, SE0, SE1, SE2, SE3, SE4 and SE5. To secure accurate
current regulations, the current sensing resistors, RISNSn should connect to the REFRTN pin directly using
dedicated connections. And the REFRTN and GND pins should be connected together using dedicated
connection as shown in figure 5.
Device Enable
The LM3463 can be disabled by pulling the EN pin to ground. The EN pin is pulled up by an internal weak-pull-
up circuit, thus the LM3463 is enabled by default. Pulling the EN pin to ground will reset all fault status. A system
restart will be undertaken when the EN pin is released from pulling low.
Open Circuit of LED String(s)
When a LED string is disconnected, the LM3463 pulls the Faultb low to indicate a fault condition. The Faultb is
an open-drain output pin. An open circuit of a LED string is detected when a VSEn is below 43 mV and the VDRn
of the corresponding channel is below 300mV simultaneously. When the fault conditions are fulfilled, the LM3463
waits for a delay time to recognize whether there is a disconnected LED or not. If the conditions of open circuit of
LED is sustained longer than the delay time, a real fault is recognized. The delay time for fault recognition is
defined by the value of an external capacitor, CFLT, and governed by the following equation:
(4)
The fault indication can be reset by either applying a falling edge to the EN pin or performing a system re-
powering.
System Clock Generator
The LM3463 includes an internal clock generator which is used to provide clock signal to the internal digital
circuits. The clock frequency at the CLKOUT pin is equal to 1/2 of the frequency of the internal system clock
generator. The system clock generator governs the rate of operation of the following functions:
• PWM dimming frequency in Serial Interface Mode
• PWM dimming frequency in DC Interface Mode
• Clock frequency in cascade operation (CLKOUT pin)
The system clock frequency is defined by the value of an external resistor, RFS following the equation:
Operation Mode
Serial Interface Mode
DC Interface Mode
Direct PWM Mode
CLKOUT Freq.
125 kHz
625 kHz
625 kHz
Dimming Freq.
488. 3Hz
488.3Hz
Virtually no limit
(5)
RFS
125 kΩ
62.2 kΩ
62.2 kΩ
Copyright © 2012, Texas Instruments Incorporated
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