LM3463_12 Datasheet, PDF (19/40 Pages) Texas Instruments – LM3463 Dynamic Headroom Controller with Thermal Control Interface and Individual Channel Dimming Control

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V_RAIL
V_RAIL(steady)
Due to the changing of LED
current, DHC adjusts the
V_RAIL to maintain constant
voltage headroom
V_RAIL maintains as the
V_IOUADJ equals 0.63V
0V
V_SEn
DHC resumes as
V_IOUTADJ increases
to above 0.63V
Time
LM3463
SNVS807 – MAY 2012
V_SEn changes
following V_IOUTADJ
0V
V_IOUTADJ
2.5V
LED current changes
with constant V_RAIL
Time
0.63V
V_RAIL remains
constant when the
V_IOUTADJ is equal
to or below 0.63V
Time
Figure 6. Holding V_RAIL when V_IOUTADJ is below 0.63V
System Startup
When the LM3463 is powered, the internal Operational Transconductance Amplifier (OTA) charges the capacitor
C_DHC through the CDHC pin. As the voltage at the CDHC pin increases, the voltage at the OutP pin starts to
reduce from V_CC. When the voltage of the OutP pin falls below V_FB + 0.7V, the OutP pin sinks current from the
V_FB node and eventually pulls up the output voltage of the primary power supply (V_RAIL). As the V_RAIL reaches
V_{DHC_READY}, the LM3463 performs a test to identify the status of the LED strings (short / open circuit of LED
strings). The V_{DHC_REDAY} is defined by an external voltage divider which consists of R_FB1 and R_FB2. The
V_{DHC_READY} is calculated following the equation:
(7)
After the test is completed, the LM3463 turns on the LED strings with regulated output currents. At the moment
that the LM3463 turns the LEDs on, the OutP pin stops sinking current from the V_FB node and in turn V_RAIL slews
down. Along with the decreasing of V_RAIL, the voltage at the V_DRn pins falls to approach 1V. When a V_DRn is
decreased to 1V, the DHC loop enters a steady state to maintain the lowest V_DRn to 1V average at a slow
manner defined by C_DHC. Figure 7 presents the changes of V_RAIL from system power up to DHC loop enters
steady state.
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