DRV2624 Datasheet, PDF (69/79 Pages) Texas Instruments – DRV2624 Ultra Low Power Closed-Loop LRA/ERM Haptic Driver with Internal Memory

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11 Layout
DRV2624
SLOS893A – DECEMBER 2015 – REVISED DECEMBER 2015
11.1 Layout Guidelines
The decoupling capacitor for the power supply (V_DD should be placed close to the device pin. The filtering
capacitor for the regulator (REG) should be placed close to the device REG pin. When creating the pad size for
the WCSP pins, TI recommends that the PCB layout use nonsolder mask-defined (NSMD) land. With this
method, the solder mask opening is made larger than the desired land area and the opening size is defined by
the copper pad width.
11.2 Layout Examples
C(REG)
TRIG/
INTZ
REG
OUT+
SDA
NRST
GND
SCL
VDD
OUT±
Via
Via should connect
to a ground plane
C(VDD)
Figure 104. Typical Layout
C(REG)
TRIG/
INTZ
REG
OUT+
SDA
NRST
GND
SCL
VDD
OUT±
Via
Via should connect
to a ground plane
C(VDD)
Figure 105. Layout without NRST Functionality
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