DRV2624 Datasheet, PDF (39/79 Pages) Texas Instruments – DRV2624 Ultra Low Power Closed-Loop LRA/ERM Haptic Driver with Internal Memory

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DRV2624
SLOS893A – DECEMBER 2015 – REVISED DECEMBER 2015
8.7.4 Address: 0x02
Figure 48. 0x02
7
6
5
Reserved
R/W-0
4
R/W-1
3
R/W-1
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5. Address: 0x02
2
INTZ_MASK[4:0]
R/W-0
1
R/W-0
0
R/W-0
BIT FIELD
7-5 Reserved
4-0 INTZ_MASK[4:0]
TYPE
R/W
R/W
DEFAULT DESCRIPTION
0
Reserved
24
Masks status bits to configure behavior of TRIG/INTZ pin when configured in interrupt mode.
Ignored otherwise.
0
When INTZ_MASK[0] = 1 the OC_DETECT status will not produce an interrupt
1
When INTZ_MASK[1] = 1 the OVER_TEMP status will not produce an interrupt
2
When INTZ_MASK[2] = 1 the UVLO status will not produce an interrupt
3
When INTZ_MASK[3] = 1 the PROCESS_DONE status will not produce an interrupt
4
When INTZ_MASK[4] = 1 the PRG_ERROR status will not produce an interrupt
8.7.5 Address: 0x03
Figure 49. 0x03
7
6
5
4
3
2
1
0
DIAG_Z_RESULT[7:0]
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
BIT FIELD
7-0 DIAG_Z_RESULT[7:0]
Table 6. Address: 0x03
TYPE
R
DEFAULT DESCRIPTION
0
This parameter shows the impedance measurement of the actuator after running the
diagnostics routine.
8.7.6 Address: 0x04
Figure 50. 0x04
7
6
5
4
3
2
1
0
VBAT[7:0]
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
BIT FIELD
7-0 VBAT[7:0]
Table 7. Address: 0x04
TYPE
R
DEFAULT DESCRIPTION
0
This parameter provides a real-time reading of the supply voltage at the VDD pin. The device
must be actively playing a waveform to take a reading.
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