DRV2624 Datasheet, PDF (40/79 Pages) Texas Instruments – DRV2624 Ultra Low Power Closed-Loop LRA/ERM Haptic Driver with Internal Memory

DRV2624
SLOS893A – DECEMBER 2015 – REVISED DECEMBER 2015
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8.7.7 Address: 0x05
Figure 51. 0x05
7
6
5
4
3
2
Reserved
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 8. Address: 0x05
1
0
LRA_PERIOD[9:8]
R-0
BIT FIELD
7-2 Reserved
1-0 LRA_PERIOD[9:0]
TYPE
R/W
R
DEFAULT DESCRIPTION
0
Reserved
0
This parameter reports the resonance frequency of the LRA in real time. Since this register is
continuously being updated, the MSB section most be read first, the LSB (and the MSB)
register will be retained until the LSB is read to preserve consistency. If the waveform finishes
and the LSB has not been read, the device will automatically unlock both registers (MSB and
LSB) and they will start to update again upon the next playback. For this reason, it is important
to read both registers during the same playback to get accurate readings. LRA period =
LRA_PERIOD[9:0] * 24.39 us. The accuracy of the reported frequency is not guaranteed during
braking.
8.7.8 Address: 0x06
Figure 52. 0x06
7
6
5
4
3
2
1
0
LRA_PERIOD[7:0]
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
BIT FIELD
7-0 LRA_PERIOD[9:0]
Table 9. Address: 0x06
TYPE
R
DEFAULT DESCRIPTION
0
This parameter reports the resonance frequency of the LRA in real time. Since this register is
continuously being updated, the MSB section most be read first, the LSB (and the MSB)
register will be retained until the LSB is read to preserve consistency. If the waveform finishes
and the LSB has not been read, the device will automatically unlock both registers (MSB and
LSB) and they will start to update again upon the next playback. For this reason, it is important
to read both registers during the same playback to get accurate readings. LRA period =
LRA_PERIOD[9:0] * 24.39 us. The accuracy of the reported frequency is not guaranteed during
braking.
40
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