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TMS320DM6433_17 Datasheet, PDF (67/271 Pages) Texas Instruments – Digital Media Processor
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TMS320DM6433
Digital Media Processor
SPRS343C – NOVEMBER 2006 – REVISED JUNE 2008
Predictions show that prototype devices (TMX or TMP) have a greater failure rate than the standard
production devices. Texas Instruments recommends that these devices not be used in any production
system because their expected end-use failure rate still is undefined. Only qualified production devices are
to be used.
TI device nomenclature also includes a suffix with the device family name. This suffix indicates the
package type (for example, ZWT), the temperature range (for example, "Blank" is the commercial
temperature range), and the device speed range in megahertz (for example, "6" indicates [600-MHz]).
Figure 2-10 provides a legend for reading the complete device name for any TMS320DM643x DMP
platform member.
TMS 320
PREFIX
TMX = Experimental device
TMS = Qualified device
DEVICE FAMILY
320 = TMS320™ DSP Family
DEVICE
C64x+™ DSP:
DM6437
DM6435
DM6433
DM6431
DM6433 ( ) ZWT ( ) ( )
DEVICE SPEED RANGE
4 = 400 MHz
5 = 500 MHz
6 = 600 MHz(D)
7 = 700 MHz
L = Low Power Device
TEMPERATURE RANGE (JUNCTION)
Blank = 0° C to 90° C, Commercial Grade
Q
= -40°C to 125°C, Automotive Grade
R
= 0° C to 90° C, Commercial Grade (Tape and Reel)
S
= -40°C to 125°C, Automotive Grade (Tape and Reel)
PACKAGE TYPE(A)
ZWT = 361-pin plastic BGA, with Pb-Free soldered balls
ZDU = 376-pin plastic BGA, with Pb-Free soldered balls [Green]
SILICON REVISION:
Blank = Revision 1.3
A. BGA = Ball Grid Array
B. For “TMX” initial devices, the device number is DM6437.
C. Not all combinations are available. For more information, see the Orderable Devices table in the Packing Information section.
D. The maximum CPU frequency for the -Q6 device is 660 MHz. See the PLL1 and PLL2 section for maximum operating
frequencies of the PLL1 controller.
E. The device speed range symbolization indicates the maximum CPU frequency when the core voltage (CVDD) is set to 1.2 V.
To determine the maximum CPU frequency the core voltage is set to 1.05V, refer to the PLL1 and PLL2 section.
Figure 2-10. Device Nomenclature
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