TMS320DM6433_17 Datasheet, PDF (222/271 Pages) Texas Instruments – Digital Media Processor

TMS320DM6433
Digital Media Processor
SPRS343C – NOVEMBER 2006 – REVISED JUNE 2008
CLKS
CLKR
FSR (int)
FSR (ext)
DR
CLKX
FSX (int)
FSX (ext)
1
2
3
3
4
4
5
6
7
2
3
3
Bit(n-1)
9
8
(n-2)
11
10
FSX (XDATDLY=00b)
DX
12
Bit 0
14
13 ^(A)
Bit(n-1)
13 ^(A)
(n-2)
A. Parameter No. 13 applies to the first data bit only when XDATDLY ≠ 0.
Figure 6-30. McBSP Timing^(B)
(n-3)
(n-3)
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Table 6-52. Timing Requirements for FSR When GSYNC = 1 (see Figure 6-31)
NO.
1
t_su(FRH-CKSH)
2
t_h(CKSH-FRH)
Setup time, FSR high before CLKS high
Hold time, FSR high after CLKS high
-7/-6/-5/-4
-L/-Q6/-Q5/-Q4
MIN
MAX
4
4
UNIT
ns
ns
CLKS
FSR external
CLKR/X (no need to resync)
CLKR/X (needs resync)
1
2
Figure 6-31. FSR Timing When GSYNC = 1
222 Peripheral Information and Electrical Specifications
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