TMS320DM6433_17 Datasheet, PDF (148/271 Pages) Texas Instruments – Digital Media Processor

TMS320DM6433
Digital Media Processor
SPRS343C – NOVEMBER 2006 – REVISED JUNE 2008
CLKMODE
CLKIN
1
OSCIN
0
PLLOUT
PLL
PLLM
PLLEN
1
0
PLLDIV1 (/1)
PLLDIV2 (/3)
PLLDIV3 (/6)
CLKMODE
CLKIN
1
OSCIN
0
BPDIV
OSCDIV1
Figure 6-5. PLL1 Structure Block Diagram
PLL
PLLM
PLLOUT
PLLEN
1
0
PLLDIV2 (/10)
PLLDIV1 (/2)
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SYSCLK1
(CLKDIV1 Domain)
SYSCLK2
(CLKDIV3 Domain)
SYSCLK3
(CLKDIV6 Domain)
AUXCLK
(CLKIN Domain)
SYSCLKBP
(VPSS-VPBE
Clock Source)
OBSCLK
(CLKOUT0 Pin)
PLL2_SYSCLK2
(VPSS−VPBE)
PLL2_SYSCLK1
(DDR2 PHY)
BPDIV
Figure 6-6. PLL2 Structure Block Diagram
PLL2_SYSCLKBP
(DDR2 VTP)
148 Peripheral Information and Electrical Specifications
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