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RM48L930 Datasheet, PDF (67/147 Pages) Texas Instruments – RM48Lx30 16/32-Bit RISC Flash Microcontroller
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RM48L930
RM48L730
RM48L530
SPNS176 – SEPTEMBER 2011
MODULE NAME
MIBSPI1 RAM
DCAN3 RAM
DCAN2 RAM
DCAN1 RAM
MIBADC2 RAM
MIBADC1 RAM
N2HET2 RAM
N2HET1 RAM
N2HET2 TU2
RAM
N2HET1 TU1
RAM
CoreSight Debug
ROM
Cortex-R4F
Debug
ETM-R4
CoreSight TPIU
POM
HTU1
HTU2
N2HET1
N2HET2
GIO
MIBADC1
FRAME CHIP
SELECT
PCS[7]
PCS[13]
PCS[14]
PCS[15]
PCS[29]
PCS[31]
PCS[34]
PCS[35]
PCS[38]
PCS[39]
CSCS0
CSCS1
CSCS2
CSCS3
CSCS4
PS[22]
PS[22]
PS[17]
PS[17]
PS[16]
PS[15]
Table 4-21. Device Memory Map (continued)
FRAME ADDRESS RANGE
START
END
0xFF0E_0000 0xFF0F_FFFF
0xFF1A_0000 0xFF1B_FFFF
0xFF1C_0000 0xFF1D_FFFF
0xFF1E_0000 0xFF1F_FFFF
0xFF3A_0000 0xFF3B_FFFF
0xFF3E_0000 0xFF3F_FFFF
0xFF44_0000
0xFF45_FFFF
0xFF46_0000
0xFF47_FFFF
FRAME ACTUA
SIZE L SIZE
128KB 2KB
128KB 2KB
128KB 2KB
128KB 2KB
128KB 8KB
128KB 8KB
128KB 16KB
128KB 16KB
RESPNSE FOR ACCESS TO
UNIMPLEMENTED LOCATIONS IN
FRAME
Abort for accesses above 2KB
Wrap around for accesses to
unimplemented address offsets lower
than 0x7FF. Abort generated for
accesses beyond offset 0x800.
Wrap around for accesses to
unimplemented address offsets lower
than 0x7FF. Abort generated for
accesses beyond offset 0x800.
Wrap around for accesses to
unimplemented address offsets lower
than 0x7FF. Abort generated for
accesses beyond offset 0x800.
Wrap around for accesses to
unimplemented address offsets lower
than 0x1FFF. Abort generated for
accesses beyond 0x1FFF.
Wrap around for accesses to
unimplemented address offsets lower
than 0x1FFF. Abort generated for
accesses beyond 0x1FFF.
Wrap around for accesses to
unimplemented address offsets lower
than 0x3FFF. Abort generated for
accesses beyond 0x3FFF.
Wrap around for accesses to
unimplemented address offsets lower
than 0x3FFF. Abort generated for
accesses beyond 0x3FFF.
0xFF4C_0000 0xFF4D_FFFF 128KB 1KB
Abort
0xFF4E_0000 0xFF4F_FFFF 128KB 1KB
Debug Components
0xFFA0_0000
0xFFA0_0FFF
4KB
4KB
0xFFA0_1000
0xFFA0_1FFF
4KB
4KB
0xFFA0_2000
0xFFA0_2FFF
4KB
4KB
0xFFA0_3000 0xFFA0_3FFF 4KB
0xFFA0_4000 0xFFA0_4FFF 4KB
Peripheral Control Registers
0xFFF7_A400 0xFFF7_A4FF 256B
4KB
4KB
256B
0xFFF7_A500 0xFFF7_A5FF 256B 256B
0xFFF7_B800 0xFFF7_B8FF 256B 256B
0xFFF7_B900 0xFFF7_B9FF 256B 256B
0xFFF7_BC00 0xFFF7_BCFF 256B 256B
0xFFF7_C000 0xFFF7_C1FF 512B 512B
Abort
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Abort
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Copyright © 2011, Texas Instruments Incorporated
System Information and Electrical Specifications
67
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