RM48L930 Datasheet, PDF (108/147 Pages) Texas Instruments – RM48Lx30 16/32-Bit RISC Flash Microcontroller

RM48L930
RM48L730
RM48L530
SPNS176 – SEPTEMBER 2011
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4.21.9 Data Modification Module (DMM)
The Data Modification Module (DMM) provides the capability to modify data in the entire 4 GB address
space of the RM4x devices from an external peripheral, with minimal interruption of the application.
4.21.9.1 Features
The DMM module has the following features:
• Acts as a bus master, thus enabling direct writes to the 4GB address space without CPU intervention
• Writes to memory locations specified in the received packet (leverages packets defined by trace mode
of the RAM trace port (RTP) module
• Writes received data to consecutive addresses, which are specified by the DMM module (leverages
packets defined by direct data mode of RTP module)
• Configurable port width (1, 2, 4, 8, 16 pins)
• Up to 100 Mbit/s pin data rate
• Unused pins configurable as GIO pins
4.21.9.2 Timing Specifications
t_l(DMM)
t_cyc(DMM)
t_h(DMM)
t_l(DMM)
t_r
Parameter
DMMSYNC
t_h(DMM)
t_f
t_cyc(DMM)
Figure 4-27. DMMCLK Timing
Table 4-46. DMMCLK Timing
MIN
t_c(HCLK) * 2
((t_cyc(DMM))/2) - ((t_r+t_f)/2)
((t_cyc(DMM))/2) - ((t_r+t_f)/2)
Clock period
High pulse width
Low pulse width
Description
t_ssu(DMM) t_sh(DMM)
DMMCLK
DMMDATA
t_dsu(DMM)
t_dh(DMM)
Figure 4-28. DMMDATA Timing
108 System Information and Electrical Specifications
Copyright © 2011, Texas Instruments Incorporated
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