ADS58J64 Datasheet, PDF(66/81 Page) Texas Instruments – Quad-Channel, 14-Bit, 1-GSPS Telecom Receiver Device

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ADS58J64 Datasheet, PDF (66/81 Pages) Texas Instruments – Quad-Channel, 14-Bit, 1-GSPS Telecom Receiver Device

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ADS58J64

SBAS807 â JANUARY 2017

8 Application and Implementation

www.ti.com

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TIâs customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

8.1 Application Information

8.1.1 Start-Up Sequence

Table 65 shows the recommended start-up sequence for a 500-MSPS, Nyquist 2 operation with DDC mode 0

enabled.

Table 65. Recommended Start-Up Sequence for 500-MSPS, Nyquist 2, DDC Mode 0 Operation

STEP

DESCRIPTION

Provide a 1.15-V power supply (AVDD, DVDD, IOVDD)

Provide a 1.9-V power supply (AVDD19)

Provide a clock to CLKINM, CLKINP and a SYSREF signal to

SYSREFM, SYSREFP

Pulse a reset (low to high to low) via a hardware reset (pin

50), wait 100 Âµs

Issue a software reset to initialize the registers

Set the high SNR mode for channels AB and CD, select trims

for 500-MSPS operation

Set up the SerDes configuration

ADC calibration

Select trims for the second Nyquist

Load linearity trims

ADDRESS

DATA

COMMENT

A 1.15-V supply must be supplied first for

proper operation.

SYSREF must be established before SPI

programming.

Hardware reset loads all trim register settings.

00h

81h

11h

00h

12h

01h

13h

00h

ABh

01h

ACh

01h

64h

02h

11h

00h

12h

60h

13h

00h

26h

0Fh

20h

80h

11h

FFh

12h

00h

13h

00h

D5h

08h

Wait 2 ms

D5h

00h

2Ah

00h

CFh

50h

11h

00h

12h

1Eh

13h

00h

2Dh

02h

11h

00h

12h

01h

13h

00h

8Ch

02h

B7h

01h

B7h

00h

Select the DIGTOP page.

Set the high SNR mode for channel A and B.

Set the high SNR mode for channel C and D.

Select trims for 500-MSPS operation.

Select the SerDes_AB and SerDes_CD

pages.

Set the K value to 16 frames per multi-frame.

Enable the K value from register 26h.

Select the ADC_A1, ADC_A2, ADC_B1,

ADC_B2, ADC_C1, ADC_C2, ADC_D1, and

ADC_D2 pages.

Enable ADC calibration.

ADC calibration time.

Disable ADC calibration.

Internal trims.

Select the channel A, channel B, channel C,

and channel D pages.

Select trims for the second Nyquist.

Select the DIGTOP page.

Load linearity trims.

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