ADS58J64 Datasheet, PDF (46/81 Pages) Texas Instruments – Quad-Channel, 14-Bit, 1-GSPS Telecom Receiver Device

ADS58J64
SBAS807 – JANUARY 2017
7.6.1.1.2.4 Register 8Fh (address = 8Fh) [reset = 0h], DIGTOP Page
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Figure 83. Register 8Fh
7
6
5
4
3
2
1
0
CUSTOMPATTERN2[7:0]
R/W-0h
LEGEND: R/W = Read/Write; -n = value after reset
Table 16. Register 8Fh Field Descriptions
Bit Field
7-0 CUSTOMPATTERN2[7:0]
Type
R/W
Reset
0h
Description
These bits select the custom pattern 2 that is used when the test
pattern select is set to dual pattern mode.
7.6.1.1.2.5 Register 90h (address = 90h) [reset = 0h], DIGTOP Page
Figure 84. Register 90h
7
6
5
4
3
2
1
0
CUSTOMPATTERN2[15:8]
R/W-0h
LEGEND: R/W = Read/Write; -n = value after reset
Table 17. Register 90h Field Descriptions
Bit Field
7-0 CUSTOMPATTERN2[15:8]
Type
R/W
Reset
0h
Description
These bits select the custom pattern 2 that is used when the test
pattern select is set to dual pattern mode.
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