ADS58J64 Datasheet, PDF (39/81 Pages) Texas Instruments – Quad-Channel, 14-Bit, 1-GSPS Telecom Receiver Device

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ADS58J64
SBAS807 – JANUARY 2017
7.6 Register Maps
7.6.1 Register Map
The ADS58J64 registers are organized on different pages depending on their internal functions. The pages are
accessed by selecting the page in the master pages 11h–13h. The page selection must only be written one time
for a continuous update of registers for that page.
There are six different SPI banks (shown in Figure 74) that group together different functions:
• GLOBAL: contains controls for accessing other SPI banks
• DIGTOP: top-level digital functions
• ANALOG: registers controlling power-down and analog functions
• SERDES_XX: registers controlling JESD204B functions
• CHX: registers controlling channel-specific functions, including DDC
• ADCXX: register page for one of the eight interleaved ADCs
Global SPI Interface
SPI_ADC_
A1, A2, B1, B2
SPI_CH_A, B
SPI_SERDES_AB
SPI_DIGTOP
SPI_ANALOG
SPI_SERDES_CD
SPI_CH_C, D
SPI_ADC_
C1, C2, D1, D2
A1
Channel A
C1
Channel C
A2
C2
Top Digital
SERDES AB
and
Analog Functions
SERDES CD
A3
D1
Channel B
Channel D
A4
D2
Figure 74. SPI Register Block Diagram
Copyright © 2017, Texas Instruments Incorporated
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