CC3220MOD_17 Datasheet, PDF (60/88 Pages) Texas Instruments – SimpleLink Wi-Fi CERTIFIED Wireless Module Solutions (S and SF)

CC3220MOD
SWRS206A – MARCH 2017 – REVISED JUNE 2017
www.ti.com
6.7.1.4 Memory Map
Table 6-4 describes the various MCU peripherals and how they are mapped to the processor memory. For
more information on peripherals, see the API document.
START ADDRESS
0x0000 0000
0x0100 0000
0x2000 0000
0x2200 0000
0x4000 0000
0x4000 4000
0x4000 5000
0x4000 6000
0x4000 7000
0x4000 C000
0x4000 D000
0x4002 0000
0x4002 4000
0x4002 0800
0x4003 0000
0x4003 1000
0x4003 2000
0x4003 3000
0x400F7000
0x400F E000
0x400F F000
0x4200 0000
0x4401 0000
0x4401 8000
0x4401 C000
0x4402 0000
0x4402 1000
0x4402 5000
0x4402 6000
0x4402 D000
0x4402 E000
0x4402 F000
0x4403 0000
0x4403 0000
0x4403 5000
0x4403 7000
0x4403 9000
0xE000 0000
0xE000 1000
0xE000 2000
0xE000 E000
0xE004 0000
END ADDRESS
0x0007 FFFF
0x010F FFFF
0x2003 FFFF
0x23FF FFFF
0x4000 0FFF
0x4000 4FFF
0x4000 5FFF
0x4000 6FFF
0x4000 7FFF
0x4000 CFFF
0x4000 DFFF
0x4000 07FF
0x4002 4FFF
0x4002 0FFF
0x4003 0FFF
0x4003 1FFF
0x4003 2FFF
0x4003 3FFF
0x400F 7FFF
0x400F EFFF
0x400F FFFF
0x43FF FFFF
0x4401 0FFF
0x4401 8FFF
0x4401 DFFF
0x4402 0FFF
0x4402 1FFF
0x4402 5FFF
0x4402 6FFF
0x4402 DFFF
0x4402 EFFF
0x4402 FFFF
0x4403 FFFF
0x4403 0FFF
0x4403 5FFF
0x4403 7FFF
0x4403 9FFF
0xE000 0FFF
0xE000 1FFF
0xE000 2FFF
0xE000 EFFF
0xE004 0FFF
Table 6-4. Memory Map
DESCRIPTION
On-chip ROM (bootloader + DriverLib)
On-chip Flash (for user application code)
Bit-banded on-chip SRAM
Bit-band alias of 0x2000 0000 to 0x200F FFFF
Watchdog timer A0
GPIO port A0
GPIO port A1
GPIO port A2
GPIO port A3
UART A0
UART A1
I²C A0 (master)
GPIO group 4
I²C A0 (slave)
General-purpose timer A0
General-purpose timer A1
General-purpose timer A2
General-purpose timer A3
Configuration registers
System control
µDMA
Bit band alias of 0x4000 0000 to 0x400F FFFF
SDIO master
Camera Interface
McASP
SSPI
GSPI
MCU reset clock manager
MCU configuration space
Global power, reset, and clock manager (GPRCM)
MCU shared configuration
Hibernate configuration
Crypto range (includes apertures for all crypto-related
blocks as follows)
DTHE registers and TCP checksum
MD5/SHA
AES
DES
Instrumentation trace Macrocell™
Data watchpoint and trace (DWT)
Flash patch and breakpoint (FPB)
NVIC
Trace port interface unit (TPIU)
COMMENT
CC3220SF device only
Used for external serial Flash
Used by application processor
60
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