CC3220MOD_17 Datasheet, PDF (42/88 Pages) Texas Instruments – SimpleLink Wi-Fi CERTIFIED Wireless Module Solutions (S and SF)

CC3220MOD
SWRS206A – MARCH 2017 – REVISED JUNE 2017
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5.13.5.1.2 SPI Slave
Figure 5-9 shows the timing diagram for the SPI slave.
T2
CLK
T6
T7
MISO
MOSI
T9
T8
Figure 5-9. SPI Slave Timing Diagram
Table 5-5 lists the timing parameters for the SPI slave.
Table 5-5. SPI Slave Timing Parameters
PARAMETER
NUMBER
F ⁽¹⁾
T2
T_clk ⁽¹⁾
D ⁽¹⁾
T6
t_IS ⁽¹⁾
T7
t_IH ⁽¹⁾
T8
t_OD ⁽¹⁾
T9
t_OH ⁽¹⁾
Clock frequency @ VBAT = 3.3 V
Clock frequency @ VBAT ≤ 2.3 V
Clock period
Duty cycle
RX data setup time
RX data hold time
TX data output delay
TX data hold time
(1) Timing parameter assumes a maximum load of 20 pF at 3.3 V.
MIN
50
45%
4
4
MAX
20
12
55%
20
24
UNIT
MHz
ns
ns
ns
ns
ns
42
Specifications
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