MSP430FG6626 Datasheet, PDF (6/171 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP430FG6626, MSP430FG6625
MSP430FG6426, MSP430FG6425
SLAS874 – MAY 2015
www.ti.com
4 Terminal Configuration and Functions
4.1 Pin Diagrams
Figure 4-1 shows the pin assignments for the MSP430FG6626 and MSP430FG6625 devices in the 100-
pin PZ package.
P6.4/CB4/AD0+/OA0O 1
P6.5/CB5/AD0-/OA0IN0 2
P6.6/CB6/AD1+/G0SW0 3
P6.7/CB7/AD1-/G0SW1 4
P7.4/CB8/AD2+/OA1O 5
P7.5/CB9/AD2-/OA1IN0 6
P7.6/CB10/AD3+/G1SW0 7
P7.7/CB11/AD3-/G1SW1 8
P5.0/VREFBG/VeREF+ 9
P5.1/A4/DAC0 10
P5.6/A5/DAC1 11
NR 12
AVSS1 13
XOUT 14
XIN 15
AVCC 16
CPCAP 17
P2.0/P2MAP0/DAC0 18
P2.1/P2MAP1/DAC1 19
P2.2/P2MAP2 20
P2.3/P2MAP3 21
P2.4/P2MAP4/R03 22
P2.5/P2MAP5 23
P2.6/P2MAP6/LCDREF/R13 24
P2.7/P2MAP7/R23 25
MSP430FG6626
MSP430FG6625
PZ PACKAGE
(TOP VIEW)
75 P9.7/S0
74 P9.6/S1
73 P9.5/S2
72 P9.4/S3
71 P9.3/S4
70 P9.2/S5
69 P9.1/S6
68 P9.0/S7
67 P8.7/S8
66 P8.6/UCB1SOMI/UCB1SCL/S9
65 P8.5/UCB1SIMO/UCB1SDA/S10
64 DVCC2
63 DVSS2
62 P8.4/UCB1CLK/UCA1STE/S11
61 P8.3/UCA1RXD/UCA1SOMI/S12
60 P8.2/UCA1TXD/UCA1SIMO/S13
59 P8.1/UCB1STE/UCA1CLK/S14
58 P8.0/TB0CLK/S15
57 P4.7/TB0OUTH/SVMOUT/S16
56 P4.6/TB0.6/S17
55 P4.5/TB0.5/S18
54 P4.4/TB0.4/S19
53 P4.3/TB0.3/S20
52 P4.2/TB0.2/S21
51 P4.1/TB0.1/S22
CAUTION: LCDCAP/R33 must be connected to DV_SS if not used.
Figure 4-1. 100-Pin PZ Package (Top View), MSP430FG6626IPZ, MSP430FG6625IPZ
6
Terminal Configuration and Functions
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