MSP430FG6626 Datasheet, PDF (23/171 Pages) Texas Instruments – Mixed-Signal Microcontrollers

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MSP430FG6626, MSP430FG6625
MSP430FG6426, MSP430FG6425
SLAS874 – MAY 2015
4.4 Pin Multiplexing
Pin multiplexing for these devices is controlled by both register settings and operating modes (for
example, if the device is in test mode). For details of the settings for each pin and schematics of the
multiplexed ports, see Section 6.12.23.
Table 4-3. Buffer Type
BUFFER TYPE NOMINAL
(STANDARD) VOLTAGE
HYSTERESIS
Analog ⁽¹⁾
3.0 V
N
HVCMOS
5.0 V
Y
LVCMOS
3.0 V
Y ⁽²⁾
Power
(DVCC) ⁽³⁾
3.0 V
N
Power
(AVCC) ⁽³⁾
3.0 V
N
Power (DVSS
and AVSS)⁽³⁾
0V
N
(1) This is a switch, not a buffer.
(2) Only for input pins
(3) This is supply input, not a buffer.
PU OR PD
N/A
N/A
Programmable
N/A
N/A
NOMINAL
PU OR PD
STRENGTH
(µA)
N/A
N/A
See
Section 5.5.5,
General-
Purpose I/Os
N/A
N/A
OUTPUT
DRIVE
STRENGTH
(mA)
OTHER
CHARACTERISTICS
See analog modules in
N/A
Section 5, Specifications for
details
See
Section 5.5.5.1,
Typical
Characteristics
– Outputs
See
Section 5.5.5.1,
Typical
Characteristics
– Outputs
N/A
SVS enables hysteresis on
DVCC
N/A
N/A
N/A
N/A
Copyright © 2015, Texas Instruments Incorporated
Terminal Configuration and Functions
23
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