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LMH6881 Datasheet, PDF (6/35 Pages) Texas Instruments – Small Signal Bandwidth: 2400 MHz
LMH6881
SNOSC72F – JUNE 2012 – REVISED FEBRUARY 2015
www.ti.com
Electrical Characteristics(1)(2)(3) (continued)
The following specifications apply for single supply with VCC = 5 V, Maximum Gain (26 dB), RL = 200 Ω, fin = 100 MHz.
TEST CONDITIONS
MIN (4)
TYP(5) MAX(4) UNIT
CMRR
Common Mode Rejection Ratio(7) Pin = −15 dBm, f = 100 MHz
−40
dBc
SR
Slew Rate
6000
V/us
Output Voltage Noise
Maximum Gain f > 1 MHz
47
nV/√Hz
Input Referred Voltage Noise
Maximum Gain f > 1 MHz
2.3
nV/√Hz
ANALOG I/O
RIN
Input Resistance
RIN
Input Resistance
Differential, INPD to INMD
Single Ended, INPS or INPD, 50-Ω
termination on unused input
100
Ω
50
Ω
VICM
Input Common Mode Voltage
Maximum Input Voltage Swing
Maximum Differential Output
Voltage Swing
Self Biased
Volts peak to peak, differential
Differential, f < 10 MHz
2.5
2.85
6
V
VPPD
VPPD
ROUT
Output Resistance
GAIN PARAMETERS
Differential, f = 100 MHz
0.4
Ω
Maximum Voltage Gain
Parallel Inputs (INPD and INMD), Rs = 100 Ω
Single-ended input (INMS or INPS), 50-Ω Rs
and 50-Ω termination on unused input.
26
26.6
dB
Minimum Gain
Parallel Inputs, Rs = 100 Ω
6
dB
Gain Steps
Available using SPI interface
80
Available using parallel interface
10
Gain Step Size
Available using SPI interface
Available using parallel interface
0.25
dB
2
Gain Step Error
Any two adjacent steps over entire range
±0.125
dB
Gain Step Phase Shift
Any two adjacent steps over entire range
±3
Degree
s
Gain Step Switching Time
20
ns
Enable/ Disable Time
Settled to 90% level
15
ns
POWER REQUIREMENTS
ICC
Supply Current
100
135 mA
P
Power
0.5
W
ICCD
Disabled Supply Current
15
mA
ALL DIGITAL INPUTS
Logic Compatibility
TTL, 2.5-V CMOS, 3.3-V CMOS, 5-V CMOS
VIL
Logic Input Low Voltage
0.4
V
VIH
Logic Input High Voltage
2.0 - 5.0
V
IIH
Logic Input High Input Current
−9
μA
IIL
Logic Input Low Input Current
−47
μA
PARALLEL MODE TIMING
tGS
Setup Time
tGH
Hold Time
SERIAL MODE
3
ns
3
ns
fCLK
SPI Clock Frequency
50% duty cycle
10
50
MHz
(7) CMRR is defined as the differential response at the output in response to a common mode signal at the input.
6
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