LMH6881 Datasheet, PDF (17/35 Pages) Texas Instruments – Small Signal Bandwidth: 2400 MHz

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LMH6881
SNOSC72F – JUNE 2012 – REVISED FEBRUARY 2015
The serial interface has four registers with address [0] to address [3]. Table 3 shows the content of each SPI
register. Registers 0 and 1 are read only. Registers 2 and 3 are read/write and control the gain and power of the
amplifier. Table 4 shows the data format of register 2 and Table 5 shows the data format of register 3.
Address
0
1
2
3
Read/Write
R
R
R/W
R/W
Table 3. SPI Registers
Name
Revision ID
Product ID
Power down
Attenuation
Description
Revision of the product
Identification of the
product
Power up/down of the
amplifier
Attenuation control
Default value [Hex]
1 (first revision)
20
0
50
7
7
Reserved
Table 4. Register 2 Definition
6
5
4
Reserved
3
2
1
OFF = 1,1: ON = 0,0
6
16dB
Table 5. Register 3 Definition
5
4
3
2
1
8dB
4dB
2dB
1dB
0.5dB
Gain [dB] = 26- (Register3 * 0.25); valid range is 0 to 80 in decimal.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
SCLK
0
Reserved
0
0.25dB
SCSb
COMMAND FIELD
DATA FIELD
C7 C6 C5 C4 C3 C2 C1 C0 D7 D6 D5 D4 D3 D2 D1 D0
(MSB)
(LSB)
SDI
R/Wb 0 0 0 A3 A2 A1 A0
Write DATA
Reserved (3-bits)
Address (4-bits)
SDO
D7 D6 D5 D4 D3 D2 D1 D0
(MSB)
(LSB)
Hi-Z
Read DATA
Single Access Cycle
Data (8-bits)
Figure 40. Serial Interface Protocol (SPI Compatible)
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