LMH6881 Datasheet, PDF (24/35 Pages) Texas Instruments – Small Signal Bandwidth: 2400 MHz

LMH6881
SNOSC72F – JUNE 2012 – REVISED FEBRUARY 2015
8.2 Typical Applications
8.2.1 LMH6881 Typical Application
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+5V
100:
100:
FILTER _{0.01 PF}
49.9:
FILTER
RF
100: LMH6881
2.5V
ADS5400
0.01 PF
49.9:
LO
5
GAIN 0-3
OCM 1.25V
SD
Figure 47. LMH6881 Typical Application
8.2.1.1 Design Requirements
Table 8 shows a design example for an IF amplifier in a typical direct-IF receiver application and LMH6882
meets these requirements.
Table 8. Example Design Requirement for an IF Receiver Application
SPECIFICATION
Supply Voltage and Current
Input structure and Impedance
Output control
RF input frequency range
Voltage Gain Range
OIP3 in RF input frequency range for Pout = 4 dBm/tone with
RL = 200 Ω
Noise Figure
Attenuation Control
EXAMPLE DESIGN REQUIREMENT
4.75 V to 5.25 V, with a minimum 150-mA supply current
DC-coupled Single-ended or Differential with 100-Ω input differential
impedance
DC coupled with output common mode control capability
DC to 250 MHz
26 dB to 6 dB
> 38 dBm at 200 MHz for Max Gain
< 12 dB at Max Gain across RF input frequency
Parallel control as well as SPI control
8.2.1.2 Detailed Design Procedure
The LMH6881 device can be included in most receiver applications by following these basic procedures:
• Select an appropriate input drive circuitry to the LMH6881 by frequency planning the signal chain properly
such that the down-converted input signal is within the input frequency specifications of the device. Identify
whether dc-or ac-coupling is required or filtering is needed to optimize the system. Follow the guidelines
mentioned in Input Characteristics for interfacing the LMH6881 inputs.
• Choose the right speed grade ADC that meets the signal bandwidth application. Based upon the noise
filtering and anti-aliasing requirement , determine the right order and type for the anti-aliasing filter. Follow the
guidelines mentioned in Output Characteristics and Interfacing to an ADC when interfacing the device to an
anti-aliasing filter.
• Optimize the signal chain gain leading up to the ADC for best SNR and SFDR performance by employing the
device in automatic gain control (AGC) loop using serial or parallel digital interface.
• While interfacing the digital inputs, verify the electrical and functional compatibility of the LMH6881 digital
input pins with the external microcontroller (µC).
• Choose the appropriate power-supply architecture and supply bypass filtering devices to provide stable, low
noise supplies as mentioned in the Power Supply Recommendations.
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