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LM3533 Datasheet, PDF (6/53 Pages) Texas Instruments – Complete Lighting Power Solution for Smartphone Handsets
LM3533
Symbol
Parameter
Conditions
Ambient Light Sensor (ALS)
RALS
ALS Internal Pulldown
Resistor in Analog Sensor
Input Mode
R_ALS Select Register = 0x0F,
2.7V ≤ VIN ≤ 5.5V
VALS_REF
Ambient Light Sensor
Reference Voltage
2.7V ≤ VIN ≤ 5.5V
VALS_MIN
tCONV
LSB
Minimum Threshold for ALS Analog Sensor Mode,
Input Voltage Sensing
2.7V ≤ VIN ≤ 5.5V, Code 0 to 1 transition point
Conversion Time
ADC Resolution
2.7V ≤ VIN ≤ 5.5V
Min
12.36
1.9
3
Typ
13.33
2
10
140
7.8
Max
13.94
2.1
15
Units
kΩ
V
mV
µs
mV
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended
to be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see Electrical Characteristics
(Note 2, Note 7).
Note 2: All voltages are with respect to the potential at the GND pin.
Note 3: For detailed soldering specifications and information, please refer to Texas Instruments Application Note 1112: Micro SMD Wafer Level Chip Scale
Package (AN-1112) available at www.ti.com.
Note 4: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ=+140°C (typ.) and disengages at
TJ=+125°C (typ.).
Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = +125°C), the maximum power
dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the
following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).
Note 6: Junction-to-ambient thermal resistance (θJA) is taken from a thermal modeling result, performed under the conditions and guidelines set forth in the JEDEC
standard JESD51-7. The test board is a 4-layer FR-4 board measuring 102mm x 76mm x 1.6mm with a 2 x 1 array of thermal vias. The ground plane on the board
is 50mm x 50mm. Thickness of copper layers are 36µm/18µm/18µm/36µm (1.5oz/1oz/1oz/1.5oz). Ambient temperature in simulation is 22°C in still air. Power
dissipation is 1W. The value of θJA of this product in the micro SMD package could fall in a range as wide as 60ºC/W to 110ºC/W (if not wider), depending on PCB
material, layout, and environmental conditions. In applications where high maximum power dissipation exists special care must be paid to thermal dissipation
issues.
Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical (Typ) numbers are not guaranteed, but do represent the most likely
norm. Unless otherwise specified, conditions for typical specifications are: VIN = 3.6V and TA = +25ºC.
Note 8: SCL and SDA must be glitch-free in order for proper brightness control to be realized.
Note 9: The human body model is a 100pF capacitor discharged through 1.5kΩ resistor into each pin. (MIL-STD-883 3015.7).
Note 10: LED current sink matching between HVLED1 and HVLED2 is given by taking the difference between either (IHVLED1 or IHVLED2) and the average
current between the two, and dividing by the average current between the two. This simplifies to (IHVLED1 (or IHVLED2) – IHVLED(AVE))/(IHVLED(AVE)) x 100. In this
test,both HVLED1 and HVLED2 are assigned to Bank A.
Note 11: LED current sink matching in the low-voltage current sinks (LVLED1 through LVLED5) is given as the maximum matching value between any two current
sinks, where the matching between any two low voltage current sinks (X and Y) is given as (ILVLEDX ( or ILVLEDY) - IAVE(X-Y))/(IAVE(X-Y)) x 100. In this test all all LVLED
current sinks are assigned to Bank C.
FIGURE 1. I2C-Compatible Interface Timing
30135789
6
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