LM3533 Datasheet, PDF (5/53 Pages) Texas Instruments – Complete Lighting Power Solution for Smartphone Handsets

LM3533
Symbol
Parameter
Conditions
R_DSON
NMOS Switch On
Resistance
I_SW = 500 mA
I_{CL_BOOST}
V_OVP
NMOS Switch Current Limit
Output Over-Voltage
Protection
V_IN = 3.6V
ON Threshold, 2.7V ≤ V_IN ≤ 5.5V
OVP select bits = 11
Hysteresis
Boost Frequency
Select Bit = 0
f_SW
Switching Frequency
2.7V ≤ V_IN ≤ 5.5V
Boost Frequency
Select Bit = 1
D_MAX
Maximum Duty Cycle
Charge Pump
I_{LVLED(1/2/3/4/5)}
Output Current Regulation 2.7V ≤ V_IN ≤ 5.5V, Full-Scale Current =
(Low-Voltage Current sinks) _{20.2mA, Brightness Code = 0xFF}
I_{MATCH_LV}
LVLED Current Sink
Matching (Note 11)
2.7V ≤ V_IN ≤ 5.5V
V_{HR_LV}
Minimum Current Sink
Headroom Voltage for
LVLED Current Sinks
I_LED = 95% of nominal, Full-Scale Current =
20.2mA
V_GTH
I_{CL_PUMP}
Threshold for gain transition V_LVLED falling
Charge Pump Current Limit ^{3V ≤ VIN ≤ 5.5V, Output 1X Gain}
Referred
2X Gain
R_OUT
Charge Pump Output
Resistance
1X Gain
HWEN Input
V_HWEN
Logic Thresholds
Logic Low
Logic High
PWM Input
V_{PWM_L}
V_{PWM_H}
INT Output
Input Logic Low
Input Logic High
2.7V ≤ V_IN ≤ 5.5V
2.7V ≤ V_IN ≤ 5.5V
V_LOW
Output Logic Low (INT
Mode)
2.7V ≤ V_IN ≤ 5.5V
I²C-Compatible Voltage Specifications (SCL, SDA)
V_IL
Input Logic Low
2.7V ≤ V_IN ≤ 5.5V
V_IH
Input Logic High
2.7V ≤ V_IN ≤ 5.5V
V_OL
Output Logic Low (SDA)
I_LOAD = 3mA
I²C-Compatible Timing Specifications (SCL, SDA) (Note 8), see Figure 1
t₁
SCL (Clock Period)
t₂
Data In Setup Time to SCL
High
t₃
Data Out Stable After SCL
Low
SDA Low Setup Time to SCL
t₄
Low (Start)
t₅
SDA High Hold Time After
SCL High (Stop)
Min Typ Max Units
0.3
Ω
880 1000 1120
mA
39
40
41
V
1
450 500
550
kHz
900 1000 1100
94
%
17 20.2
23
mA
−2
1
2
%
80
110
mV
110
mV
180 350
mA
240
1.1
Ω
0
1.2
0
1.25
0.4
V
V_IN
400
mV
V_IN
400
mV
0
1.25
400
mV
V_IN
V
400
mV
2.5
µs
100
ns
0
ns
100
ns
100
ns
Copyright © 1999-2012, Texas Instruments Incorporated
5