DS90CR481_15 Datasheet, PDF (6/25 Pages) Texas Instruments – 48-Bit LVDS Channel Link SER/DES − 65 - 112 MHz

DS90CR481, DS90CR482
SNLS137D – NOVEMBER 2000 – REVISED APRIL 2013
Chipset RSKM Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified. See APPLICATIONS
INFORMATION section^{(1) (2)}.
Symbol
Parameter
Min
Typ
Max
RSKM
Receiver Skew Margin without Deskew f = 112 MHz
170
in non-DC Balance Mode, (Figure 13),
(3)
f = 100 MHz
170
240
f = 85MHz
300
350
f = 66MHz
300
350
RSKM
Receiver Skew Margin without Deskew f = 112 MHz
170
in DC Balance Mode, (Figure 13), ⁽³⁾
f = 100 MHz
170
200
f = 85 MHz
250
300
f = 66 MHz
250
300
RSKMD
Receiver Skew Margin with Deskew in f = 33 to 80 MHz
DC Balance, (Figure 14),
(4)
0.25TBIT
RDR
RDSS
Receiver Deskew Range
Receiver Deskew Step Size
f = 80 MHz
f = 80 MHz
±1
0.3 TBIT
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Units
ps
ps
ps
ps
ps
ps
ps
ps
ps
TBIT
ns
(1) The Minimum and Maximum Limits are based on statistical analysis of the device performance over voltage and temperature ranges.
This parameter is functionally tested on Automatic Test Equipment (ATE). ATE is limited to 85MHz. A sample of characterization parts
have been bench tested to verify functional performance.
(2) Typical values for RSKM and RSKMD are applicable for fixed V_CC and T _A of the Transmitter and Receiver (both are assumed to be at
the same V_CC and T _A points).
(3) Receiver Skew Margin (RSKM) is defined as the valid data sampling region at the receiver inputs. This margin takes into account
transmitter output pulse positions (min and max) and the receiver input setup and hold time (internal data sampling window, RSPOS).
This margin allows for LVDS interconnect skew, inter-symbol interference (both dependent on type/length of cable) and clock jitter
(TJCC).RSKM ≥ cable skew (type, length) + source clock jitter (cycle to cycle,TJCC) + ISI (if any). See APPLICATIONS INFORMATION
section for more details.
(4) Receiver Skew Margin with Deskew (RSKMD) is defined as the valid data sampling region at the receiver inputs. The DESKEW function
will constrain the receiver’s sampling strobes to the middle half of the LVDS bit and removes (adjusts for) fixed interconnect skew. This
margin (RSKMD) allows for inter-symbol interference (dependent on type/length of cable), Transmitter Pulse Position (TPPOS) variance,
and LVDS clock jitter (TJCC).RSKMD ≥ ISI + TPPOS(variance) + source clock jitter (cycle to cycle, TJCC). See APPLICATIONS
INFORMATION section for more details.
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