AMC1204_15 Datasheet, PDF (6/37 Pages) Texas Instruments – AMC1204 20-MHz, Second-Order, Isolated Delta-Sigma Modulator

AMC1204, AMC1204B
SBAS512E – APRIL 2011 – REVISED SEPTEMBER 2015
www.ti.com
6.5 Electrical Characteristics
All minimum/maximum specifications at T_A = –40°C to 105°C, AVDD = 4.5 V to 5.5 V, DVDD = 2.7 V to 5.5 V, VINP = –250
mV to 250 mV, VINN = 0 V, and sinc³ filter with OSR = 256, unless otherwise noted.
Typical values are at T_A = 25°C, AVDD = 5 V, and DVDD = 3.3 V.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
RESOLUTION
Resolution
16
Bits
DC ACCURACY
INL
DNL
Integral linearity error⁽¹⁾
Differential nonlinearity
T_A = –40°C to 85°C
T_A = –40°C to 105°C
–8
±2
–16
±5
–1
8
LSB
16
LSB
1
LSB
V_OS
TCV_OS
G_ERR
TCG_ERR
PSRR
Offset error⁽²⁾
Offset error thermal drift
Gain error⁽²⁾
Gain error thermal drift
Power-supply rejection ratio
–1
–3.5
–2%
±0.1
±1
±0.5%
±30
79
1
mV
3.5 μV/°C
2%
ppm/°C
dB
ANALOG INPUTS
FSR
Full-scale differential voltage input range
VINP – VINN
±320
mV
Specified FSR
V_CM
Operating common-mode signal⁽³⁾
C_I
Input capacitance to AGND
C_ID
Differential input capacitance
R_ID
Differential input resistance
I_IL
Input leakage current
VINP or VINN
VINP – VINN = ±250 mV
VINP – VINN = ±320 mV
–250
250
mV
–160
AVDD
mV
7
pF
3.5
pF
12.5
kΩ
–10
10
μA
–50
50
μA
CMTI
Common-mode transient immunity
15
kV/μs
CMRR
Common-mode rejection ratio
EXTERNAL CLOCK
V_IN from 0 V to 5 V at 0 Hz
V_IN from 0 V to 5 V at 100 kHz
108
dB
114
dB
t_CLKIN
f_CLKIN
Clock period
Input clock frequency
Duty_CLKIN Duty cycle
AC ACCURACY
5 MHz ≤ f_CLKIN < 20 MHz
20 MHz ≤ f_CLKIN ≤ 22 MHz
45.5
5
40%
45%
50
20
50%
50%
200
22
60%
55%
ns
MHz
SINAD
Signal-to-noise + distortion
SNR
Signal-to-noise ratio
THD
Total harmonic distortion
SFDR
Spurious-free dynamic range
DIGITAL INPUTS⁽³⁾
f_IN = 1kHz, T_A = –40°C to 85°C
f_IN = 1kHz, T_A = –40°C to 105°C
f_IN = 1kHz, T_A = –40°C to 85°C
f_IN = 1kHz, T_A = –40°C to 105°C
f_IN = 1kHz, T_A = –40°C to 85°C
f_IN = 1kHz, T_A = –40°C to 105°C
f_IN = 1kHz, T_A = –40°C to 85°C
f_IN = 1kHz, T_A = –40°C to 105°C
78
87
70
87
84
88
83
88
–96
–96
82
96
72
96
dB
dB
dB
dB
–80
dB
–70
dB
dB
dB
I_IN
Input current
C_IN
Input capacitance
CMOS logic family
V_IN = DVDD to DGND
–10
10
μA
5
pF
CMOS with Schmitt-trigger
V_IH
High-level input voltage
V_IL
Low-level input voltage
LVCMOS logic family
DVDD = 4.5V to 5.5V
DVDD = 4.5V to 5.5V
0.7DVDD
DVDD + 0.3
V
–0.3
0.3DVDD
V
LVCMOS
V_IH
High-level input voltage
DVDD = 2.7 V to 3.6 V
2
DVDD + 0.3
V
(1) Integral nonlinearity is defined as the maximum deviation from a straight line passing through the end-points of the ideal ADC transfer
function expressed as number of LSBs or as a percent of the specified 500-mV input range.
(2) Maximum values, including temperature drift, are ensured over the full specified temperature range.
(3) Ensured by design.
6
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