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AMC1204_15 Datasheet, PDF (18/37 Pages) Texas Instruments – AMC1204 20-MHz, Second-Order, Isolated Delta-Sigma Modulator
AMC1204, AMC1204B
SBAS512E – APRIL 2011 – REVISED SEPTEMBER 2015
Feature Description (continued)
www.ti.com
VINP
VINN
AVDD
AGND
AGND
CIP = 3pF
200W
S1
S1
200W
S2
CDIFF = 4pF
S2
AGND + 0.8V
Equivalent
Circuit
VINP
AGND + 0.8V
VINN
CIN = 3pF
AGND
REFF =
1
fCLKIN ´ CDIFF
(fCLKIN = 20MHz)
Figure 42. Equivalent Analog Input Circuit
AGND
3pF
REFF = 12.5kW
3pF
AGND
There are two restrictions on the analog input signals VINP and VINN. First, if the input voltage exceeds the
range AGND – 0.5 V to AVDD + 0.3 V, the input current must be limited to 10 mA because the input protection
diodes on the front end of the converter begin to turn on. In addition, the linearity and the noise performance of
the device are ensured only when the differential analog input voltage remains within ±250 mV.
7.3.2 Modulator
The modulator topology of the AMC1204 and AMC1204B is fundamentally a second-order, switched-capacitor,
ΔΣ modulator, such as the one conceptualized in Figure 43. The analog input voltage (X(t)) and the output of the
1-bit digital-to-analog converter (DAC) are differentiated, providing an analog voltage (X2) at the input of the first
integrator or modulator stage. The output of the first integrator is further differentiated with the DAC output; the
resulting voltage (X3) feeds the input of the second integrator stage. When the value of the integrated signal (X4)
at the output of the second stage equals the comparator reference voltage, the output of the comparator
switches from high to low, or vice versa, depending on its previous state. In this case, the 1-bit DAC responds on
the next clock pulse by changing its analog output voltage (X6), causing the integrators to progress in the
opposite direction, while forcing the value of the integrator output to track the average of the input.
X(t)
X2
Integrator 1
fS
X3
X4
Integrator 2
VREF
fCLK
DATA
Comparator
X6
DAC
Figure 43. Block Diagram Of A Second-Order Modulator
The modulator shifts the quantization noise to high frequencies, as shown in Figure 44; therefore, a low-pass
digital filter should be used at the output of the device to increase the overall performance. This filter is also used
to convert from the 1-bit data stream at a high sampling rate into a higher-bit data word at a lower rate
(decimation). A digital signal processor (DSP), microcontroller (µC), or field programmable gate array (FPGA)
can be used to implement the filter.
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