OMAP3515_17 Datasheet, PDF (56/263 Pages) Texas Instruments – Applications Processors

OMAP3515, OMAP3503
SPRS505H – FEBRUARY 2008 – REVISED OCTOBER 2013
www.ti.com
Table 2-2. Ball Characteristics (CBC Pkg.)⁽¹⁾ (continued)
BALL
BALL TOP PIN NAME
BOTTOM [1]
[2]
[3]
MODE [4]
hsusb2_data
3
6
gpio_181
4
safe_mode
7
W8
NA
mcspi2_simo
0
gpt9_pwm_e
1
vt
hsusb2_tll_d
2
ata4
hsusb2_data
3
4
gpio_179
4
safe_mode
7
U8
NA
mcspi2_somi
0
W10
gpt10_pwm_
1
evt
hsusb2_tll_d
2
ata5
hsusb2_data
3
5
gpio_180
4
safe_mode
7
NA
mmc2_clk
0
mcspi3_clk
1
gpio_130
4
safe_mode
7
R10
NA
mmc2_cmd
0
mcspi3_simo
1
gpio_131
4
safe_mode
7
T10
NA
mmc2_dat0
0
mcspi3_somi
1
gpio_132
4
safe_mode
7
T9
NA
mmc2_dat1
0
gpio_133
4
safe_mode
7
U10
NA
mmc2_dat2
0
mcspi3_cs1
1
gpio_134
4
safe_mode
7
U9
NA
mmc2_dat3
0
mcspi3_cs0
1
gpio_135
4
safe_mode
7
V10
NA
mmc2_dat4
0
mmc2_dir_da
1
t0
mmc3_dat0
3
gpio_136
4
safe_mode
7
TYPE [5]
O
IO
-
IO
IO
IO
I
IO
-
IO
IO
IO
O
IO
-
O
IO
IO
-
IO
IO
IO
-
IO
IO
IO
-
IO
IO
-
IO
O
IO
-
IO
IO
IO
-
IO
O
IO
IO
-
BALL
RESET
STATE [6]
BALL
RESET REL.
STATE [7]
RESET REL.
MODE [8]
POWER [9]
HYS [10]
BUFFER PULLUP
STRENG TH /DOWN IO CELL [13]
(mA) [11] TYPE [12]
L
L
7
vdds
Yes
4 ⁽¹²⁾
PU100/
LVCMOS
PD100
L
L
7
vdds
Yes
4 ⁽¹²⁾
PU100/
LVCMOS
PD100
L
L
7
vdds
Yes
4 ⁽¹³⁾
PU100/
LVCMOS
PD100
H
H
7
vdds
Yes
4 ⁽¹³⁾
PU100/
LVCMOS
PD100
H
H
7
vdds
Yes
4 ⁽¹³⁾
PU100/
LVCMOS
PD100
H
H
7
vdds
Yes
4 ⁽¹³⁾
PU100/
LVCMOS
PD100
H
H
7
vdds
Yes
4 ⁽¹³⁾
PU100/
LVCMOS
PD100
H
H
7
vdds
Yes
4 ⁽¹³⁾
PU100/
LVCMOS
PD100
L
L
7
vdds
Yes
4 ⁽¹³⁾
PU100/
LVCMOS
PD100
(13) The capacity load range is [2 pf to 6 pF].
56
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