TMS320TCI6614 Datasheet, PDF (51/188 Pages) Texas Instruments – Communications Infrastructure KeyStone SoC

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3.3.16 Timer Input Selection Register (TINPSEL)
TMS320TCI6614
Communications Infrastructure KeyStone SoC
SPRS671—June 2011
Timer input selection is handled within the control register TINPSEL. The Timer Input Selection Register is shown
in Figure 3-15 and described in Table 3-17.
Figure 3-15 Timer Input Selection Register (TINPSEL)
31
24
Reserved
R/W-1
23
R/W-0
22
R/W-1
21
R/W-0
R/W-1
spacer
20
19
R/W-0
18
R/W-1
17
R/W-0
16
TINPHSEL11
TINPLSEL11
TINPHSEL10
TINPLSEL10
TINPHSEL9
TINPLSEL9
TINPHSEL8
TINPLSEL8
R/W-1
15
R/W-0
14
R/W-1
13
R/W-0
R/W-1
spacer
12
11
R/W-0
10
R/W-1
9
R/W-0
8
TINPHSEL7
TINPLSEL7
TINPHSEL6
TINPLSEL6
TINPHSEL5
TINPLSEL5
TINPHSEL4
TINPLSEL4
R/W-1
7
R/W-0
6
R/W-1
5
R/W-0
R/W-1
spacer
4
3
R/W-0
2
R/W-1
1
R/W-0
0
TINPHSEL3
TINPLSEL3
TINPHSEL2
TINPLSEL2
TINPHSEL1
TINPLSEL1
TINPHSEL0
TINPLSEL0
R/W-1
R/W-0
R/W-1
R/W-0
R/W-1
R/W-0
R/W-1
R/W-0
Legend: R = Read only; W = Write only; -n = value after reset
Table 3-17 Timer Input Selection Field Description (TINPSEL) (Part 1 of 2)
Bit Field
31-24 Reserved
23 TINPHSEL11
22 TINPLSEL11
21 TINPHSEL10
20 TINPLSEL10
19 TINPHSEL9
18 TINPLSEL9
17 TINPHSEL8
16 TINPLSEL8
Description
Reserved
Input select for TIMER11 high.
0 = TIMI0
1 = TIMI1
Input select for TIMER11 low.
0 = TIMI0
1 = TIMI1
Input select for TIMER10 high.
0 = TIMI0
1 = TIMI1
Input select for TIMER10 low.
0 = TIMI0
1 = TIMI1
Input select for TIMER9 high.
0 = TIMI0
1 = TIMI1
Input select for TIMER9 low.
0 = TIMI0
1 = TIMI1
Input select for TIMER8 high.
0 = TIMI0
1 = TIMI1
Input select for TIMER8 low.
0 = TIMI0
1 = TIMI1
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