English
Language : 

TMS320TCI6614 Datasheet, PDF (16/188 Pages) Texas Instruments – Communications Infrastructure KeyStone SoC
TMS320TCI6614
Communications Infrastructure KeyStone SoC
SPRS671—June 2011
2 Device Overview
www.ti.com
2.1 Device Characteristics
Table 2-1 provides an overview of the TMS320TCI6614 DSP. The table shows significant features of the TCI6614
device, including the capacity of on-chip RAM, the peripherals, the CPU frequency, and the package type with pin
count.
2.2 CPU (DSP Core) Description
Table 2-1
Characteristics of the TCI6614 Processor (Part 1 of 2)
HARDWARE FEATURES
DDR3 Memory Controller (64-bit bus width) [1.5-V I/O]
(clock source = DDRREFCLKN|P)
EDMA3 (16 independent channels) [CPU/2 clock rate]
EDMA3 (64 independent channels) [CPU/3 clock rate]
High-speed 1×/2×/4× Serial RapidIO Port (4 lanes)
Second-generation Antenna Interface (AIF2)
I2C
Peripherals
SPI
PCIe (2 lanes)
UART (2)
10/100/1000 Ethernet MAC (EMAC)
Management Data Input/Output (MDIO)
64-Bit Timers (Configurable)
(internal clock source = CPU/6 clock frequency)
General-Purpose Input/Output Port (GPIO)
VCP2 (clock source = CPU/3 clock frequency)
Encoder/Decoder
Coprocessors
TCP3d (clock source = CPU/2 clock frequency)
FFTC (clock source = CPU/3 clock frequency)
BCP (clock source = CPU/3 clock frequency)
Receive Accelerator (RAC)
Transmit Accelerator (TAC)
Accelerators
Rake/Search Accelerator
Packet Accelerator
Security Accelerator (1)
Size (Bytes)
On-Chip Memory
Organization
C66x CorePac
Revision ID
JTAG BSDL_ID
CorePac Revision ID Register (address location: 0181 2000h)
JTAGID register (address location: 0x02620018)
TMS320TCI6614
1
1
2
1
1
1
1
1
2
2
1
Twelve 64-bit or Sixteen 32-bit
32
4
2
2
1
2
1
4
1
1
7348KB
128KB CorePac L1 Program Memory Controller
[SRAM/Cache] 128KB CorePac L1 Data Memory
Controller
[SRAM/Cache] 4096KB CorePac L2 Unified
Memory/Cache
500KB ARM Local L2
256KB ARM L2 Cache
32KB ARM L1I
32KB ARM L1D
2048KB MSMC SRAM
128KB L3 ROM
See Section 5.6 ‘‘CorePac Revision’’ on page 67.
See Section 3.3.3 ‘‘JTAG ID (JTAGID) Register
Description’’ on page 43
16
Copyright 2011 Texas Instruments Incorporated