TMS320TCI6614 Datasheet, PDF (154/188 Pages) Texas Instruments – Communications Infrastructure KeyStone SoC

TMS320TCI6614
Communications Infrastructure KeyStone SoC
SPRS671—June 2011
Table 8-67 Reset Isolation Register (RSISO) Field Descriptions
Bit
31-10
9
Acronym
Reserved
SRIOISO
8
SRISO
7-4 Reserved
3
AIF2ISO
2-0 Reserved
End of Table 8-67
Description
Reserved.
Isolate SRIO module
0 = Not reset isolated
1 = Reset Isolated
Isolate SmartReflex
0 = Not reset isolated
1 = Reset Isolated
Reserved.
Isolate AIF2 module
0 = Not reset isolated
1 = Reset isolated
Reserved.
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8.8.3 Main PLL Control Registers
The Main PLL uses two chip-level registers (MAINPLLCTL0 and MAINPLLCTL1) along with the PLL controller
for its configuration. These MMRs exist inside the Bootcfg space. To write to these registers, software should go
through an un-locking sequence using KICK0/KICK1 registers. For valid configurable values into the
MAINPLLCTL register see Section 2.5.3 ‘‘PLL Settings’’ on page 35. See 3.3.4 ‘‘Kicker Mechanism (KICK0 and
KICK1) Register’’ on page 43 for the address location of the registers and locking and unlocking sequences for
accessing the registers. These registers reset only on a POR reset. See Figure 8-27 and Table 8-68 for MAINPLLCTL0
details and Figure 8-28 and Table 8-69 for MAINPLLCTL1 details.
Figure 8-27 Main PLL Control Register (MAINPLLCTL0)
31
24
23
19
18
12
11
6
5
0
BWADJ[7:0]
Reserved
PLLM[12:6]
Reserved
PLLD
RW,+0000 0101
RW - 0000 0
RW,+0000000
RW, +000000 RW,+000000
Legend: RW = Read/Write; -n = value after reset
Table 8-68 Main PLL Control Register (MAINPLLCTL0) Field Descriptions
Bit
Field
31-24 BWADJ[7:0]
23-19 Reserved
18-12 PLLM[12:6]
11-6 Reserved
5-0 PLLD
End of Table 8-68
Description
BWADJ should be programmed to a value equal to half of PLLM[12:0]. Example: PLLM = 15, then BWADJ = 7
Reserved
A 13-bit bus that selects the values for the multiplication factor (see Note below)
Reserved
A 6-bit bus that selects the values for the reference divider
Figure 8-28 Main PLL Control Register (MAINPLLCTL1)
31
Reserved
RW - 0000000000000000000000000
Legend: RW = Read/Write; -n = value after reset
7
6
5
0
ENSAT Reserved
RW - 0 RW- 000000
154
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