LP2996A Datasheet, PDF (5/29 Pages) Texas Instruments – DDR Termination Regulator

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LP2996A
SNOSCY7 – JUNE 2014
6.4 Thermal Information
THERMAL METRIC^(1)(2)(3)
SO PowerPAD-8 DDA
8 PINS
UNIT
R_θJA
R_θJC(top)
R_θJB
ψ_JT
ψ_JB
R_θJC(bot)
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
56.5
65.1
36.5
°C/W
15.9
36.5
8.4
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The package thermal impedance is calculated in accordance with JESD 51-7
(3) Thermal Resistances were simulated on a 4 layer, JEDEC board.
6.5 Electrical Characteristics
Specifications are for T_J = 25°C and apply over the full Operating Temperature Range (T_J = 0°C to +125°C)⁽¹⁾. Unless
otherwise specified, AVIN = PVIN = 2.5V, VDDQ = 2.5V⁽²⁾.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
V_REF voltage (DDR I)
VIN = VDDQ = 2.3 V
VIN = VDDQ = 2.5 V
1.135
1.235
1.158
1.258
1.185
1.285
VIN = VDDQ = 2.7 V
1.335
1.358
1.385
V_REF
V_REF voltage (DDR II)
PVIN = VDDQ = 1.7 V
PVIN = VDDQ = 1.8 V
PVIN = VDDQ = 1.9 V
0.837
0.887
0.936
0.860
0.910
0.959
0.887
0.937
V
0.986
V_REF Voltage (DDR III)
PVIN = VDDQ = 1.35V
PVIN = VDDQ = 1.5V
0.669
0.743
0.684
0.758
0.699
0.773
PVIN = VDDQ = 1.6V
0.793
0.808
0.823
Z_VREF
V_TT
V_REF Output Impedance
V_TT Output Voltage (DDR I) ⁽³⁾
I_REF = –30 to +30 µA
I_OUT = 0 A
VIN = VDDQ = 2.3 V
1.120
2.5
1.159
kΩ
1.190
VIN = VDDQ = 2.5 V
1.210
1.259
1.290
VIN = VDDQ = 2.7 V
I_OUT = +/– 1.5 A
VIN = VDDQ = 2.3 V
1.320
1.125
1.359
1.159
1.390
V
1.190
VIN = VDDQ = 2.5 V
1.225
1.259
1.290
V_TT Output Voltage (DDR II) ⁽³⁾
VIN = VDDQ = 2.7 V
I_OUT = 0 A, AVIN = 2.5 V
PVIN = VDDQ = 1.7 V
1.325
0.822
1.359
0.856
1.390
0.887
PVIN = VDDQ = 1.8 V
0.874
0.908
0.939
PVIN = VDDQ = 1.9 V
I_OUT = +/– 0.5A, AVIN = 2.5 V
PVIN = VDDQ = 1.7 V
0.923
0.820
0.957
0.856
0.988
V
0.890
PVIN = VDDQ = 1.8 V
0.870
0.908
0.940
PVIN = VDDQ = 1.9 V
0.920
0.957
0.990
(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using
Statistical Quality Control (SQC) methods. The limits are used to calculate Texas Instruments' Average Outgoing Quality Level (AOQL).
(2) VIN is defined as VIN = AVIN = PVIN.
(3) V_TT load regulation is tested by using a 10 ms current pulse and measuring V_TT.
Copyright © 2014, Texas Instruments Incorporated
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