LP2996A Datasheet, PDF (12/29 Pages) Texas Instruments – DDR Termination Regulator

LP2996A
SNOSCY7 – JUNE 2014
Application Information (continued)
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180
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0
SOP Board
JEDEC Board
200 400 600 800 1000
AIRFLOW (Linear Feet per Minute)
Figure 17. Θ_JA vs Airflow
Additional improvements can be made by the judicious use of vias to connect the part and dissipate heat to an
internal ground plane. Using larger traces and more copper on the top side of the board can also help. With
careful layout it is possible to reduce the θ_JA further than the nominal values shown in Figure 17.
Layout is also extremely critical to maximize the output current with the SO PowerPAD package. By simply
placing vias under the DAP the θ_JA can be lowered significantly.
Additional improvements in lowering the θ_JA can also be achieved with a constant airflow across the package.
Maintaining the same conditions as above and utilizing the 2x2 via array, Figure 18 shows how the θ_JA varies
with airflow.
51
50
49
48
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45
0
100 200 300 400 500 600
AIRFLOW (Linear Feet Per Minute)
Figure 18. Θ_JA vs Airflow Speed (Jedec Board with 4 Vias)
Optimizing the θ_JA and placing the LP2996A in a section of a board exposed to lower ambient temperature
allows the part to operate with higher power dissipation. The internal power dissipation can be calculated by
summing the three main sources of loss: output current at V_TT, either sinking or sourcing, and quiescent current
at AVIN and VDDQ. During the active state (when shutdown is not held low) the total internal power dissipation
can be calculated from the following equations:
P_D = P_AVIN + P_VDDQ + P_VTT
where
(3)
P_AVIN = I_AVIN * V_AVIN
(4)
P_VDDQ = V_VDDQ * I_VDDQ = V_VDDQ2 x R_VDDQ
(5)
To calculate the maximum power dissipation at V_TT both conditions at V_TT need to be examined, sinking and
sourcing current. Although only one equation will add into the total, V_TT cannot source and sink current
simultaneously.
P_VTT = V_VTT x I_LOAD (Sinking) or
(6)
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