DS90CF384AQ_15 Datasheet, PDF (5/18 Pages) Texas Instruments – +3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65 MHz

www.ti.com
DS90CF384AQ
SNLS345A – AUGUST 2011 – REVISED APRIL 2013
Figure 5. Receiver Output Setup/Hold and High/Low Times
Figure 6. Receiver Clock In to Clock Out Delay
Figure 7. Receiver Phase Lock Loop Set Time
Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links: DS90CF384AQ
Submit Documentation Feedback
5