DS90CF384AQ_15 Datasheet, PDF (15/18 Pages) Texas Instruments – +3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65 MHz

DGG0056A
A
1
SCALE 1.200
8.3
7.9
TYP
PIN 1 ID
AREA
54X 0.5
56
PACKAGE OUTLINE
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
C
SEATING PLANE
0.1 C
14.1
2X
13.9
NOTE 3
13.5
28
29
B
6.2
6.0
56X
0.27
0.17
1.2 MAX
0.08 C A B
SEE DETAIL A
(0.15) TYP
0.25
GAGE PLANE
0 -8
0.75
0.50
0.15
0.05
DETAIL A
TYPICAL
4222167/A 07/2015
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-153.
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