OMAP3515_15 Datasheet, PDF (48/264 Pages) Texas Instruments – OMAP3515 and OMAP3503 Applications Processors

OMAP3515, OMAP3503
SPRS505H – FEBRUARY 2008 – REVISED OCTOBER 2013
www.ti.com
Table 2-2. Ball Characteristics (CBC Pkg.)⁽¹⁾ (continued)
BALL
BALL TOP PIN NAME
BOTTOM [1]
[2]
[3]
MODE [4]
NA
NA
NA
NA
NA
NA
AE21
U20
sdrc_ncas
0
B13
sdrc_nclk
0
T21
sdrc_ncs0
0
T20
sdrc_ncs1
0
V21
sdrc_nras
0
Y18
sdrc_nwe
0
NA
dss_data0
0
AE22
uart1_cts
2
gpio_70
4
safe_mode
7
NA
dss_data1
0
AE23
uart1_rts
2
gpio_71
4
safe_mode
7
NA
dss_data2
0
AE24
gpio_72
4
safe_mode
7
NA
dss_data3
0
AD23
gpio_73
4
safe_mode
7
NA
dss_data4
0
AD24
uart3_rx_irrx
2
gpio_74
4
safe_mode
7
NA
dss_data5
0
AC26
uart3_tx_irtx
2
gpio_75
4
safe_mode
7
NA
dss_data10
0
AD26
gpio_80
4
safe_mode
7
NA
dss_data11
0
AA25
gpio_81
4
safe_mode
7
NA
dss_data12
0
gpio_82
4
safe_mode
7
Y25
NA
dss_data13
0
AA26
gpio_83
4
safe_mode
7
NA
dss_data14
0
AB26
gpio_84
4
safe_mode
7
NA
dss_data15
0
gpio_85
4
safe_mode
7
F25
NA
dss_data20
0
TYPE [5]
O
O
O
O
O
O
IO
I
IO
-
IO
O
IO
-
IO
IO
-
IO
IO
-
IO
I
IO
-
IO
O
IO
-
IO
IO
-
IO
IO
-
IO
IO
-
IO
IO
-
IO
IO
-
IO
IO
-
O
BALL
RESET
STATE [6]
BALL
RESET REL.
STATE [7]
RESET REL.
MODE [8]
POWER [9]
1
1
0
vdds
1
1
0
vdds
1
1
0
vdds
1
1
0
vdds
1
1
0
vdds
1
1
0
vdds
L
L
7
vdds
HYS [10]
No
No
No
No
No
No
No
BUFFER PULLUP
STRENG TH /DOWN IO CELL [13]
(mA) [11] TYPE [12]
4 ⁽³⁾
NA
LVCMOS
4 ⁽³⁾
NA
LVCMOS
4 ⁽³⁾
NA
LVCMOS
4 ⁽³⁾
NA
LVCMOS
4 ⁽³⁾
NA
LVCMOS
4 ⁽³⁾
NA
LVCMOS
4
PU100/
LVCMOS
PD100
L
L
7
vdds
No
4
PU100/
LVCMOS
PD100
L
L
7
vdds
No
4
PU100/
LVCMOS
PD100
L
L
7
vdds
No
4
PU100/
LVCMOS
PD100
L
L
7
vdds
No
4
PU100/
LVCMOS
PD100
L
L
7
vdds
No
4
PU100/
LVCMOS
PD100
L
L
7
vdds
NA
4
PU100/
LVCMOS
PD100
L
L
7
vdds
NA
4
PU100/
LVCMOS
PD100
L
L
7
vdds
NA
4
PU100/
LVCMOS
PD100
L
L
7
vdds
NA
4
PU100/
LVCMOS
PD100
L
L
7
vdds
NA
4
PU100/
LVCMOS
PD100
L
L
7
vdds
NA
4
PU100/
LVCMOS
PD100
H
H
7
vdds
Yes
4
PU100/
LVCMOS
PD100
48
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